rk3066b: fix dclk_lcdc src bit

diff --git a/arch/arm/mach-rk30/clock_data-rk3066b.c b/arch/arm/mach-rk30/clock_data-rk3066b.c
index 10eb5fc9151367dbe2545c1058d967a0563a9230..e0b57663173e078064dabb12c3c8f0cb47c5f3ad 100644 (file)
--- a/arch/arm/mach-rk30/clock_data-rk3066b.c
+++ b/arch/arm/mach-rk30/clock_data-rk3066b.c
@@ -1520,7 +1520,7 @@ static struct clk dclk_lcdc0 = {
        .recalc         = clksel_recalc_div,
        .gate_idx       = CLK_GATE_DCLK_LCDC0_SRC,
        .clksel_con     = CRU_CLKSELS_CON(27),
-       CRU_SRC_SET(0x1, 4),
+       CRU_SRC_SET(0x1, 0),
        CRU_DIV_SET(0xff, 8, 256),
        CRU_PARENTS_SET(dclk_lcdc0_parents),
 };
@@ -1533,7 +1533,7 @@ static struct clk dclk_lcdc1 = {
        .recalc         = clksel_recalc_div,
        .gate_idx       = CLK_GATE_DCLK_LCDC1_SRC,
        .clksel_con     = CRU_CLKSELS_CON(28),
-       CRU_SRC_SET(0x1, 4),
+       CRU_SRC_SET(0x1, 0),
        CRU_DIV_SET(0xff, 8, 256),
        CRU_PARENTS_SET(dclk_lcdc1_parents),
 };