bnx2: Remove config access to non-standard registers
authorMichael Chan <mchan@broadcom.com>
Wed, 24 Nov 2010 13:48:55 +0000 (13:48 +0000)
committerDavid S. Miller <davem@davemloft.net>
Sun, 28 Nov 2010 18:47:20 +0000 (10:47 -0800)
In KVM passthrough mode, the driver may not have config access to
non-standard registers.  The BNX2_PCICFG_MISC_CONFIG config register
access to setup mailbox swapping can be done using MMIO.

Update version to 2.0.20.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/bnx2.c

index 78f91ef44969ab9db8cf8d8c112c2ac7c9ece7c5..03209a37883e35dc72615e4927a32eb4900b459c 100644 (file)
@@ -56,8 +56,8 @@
 #include "bnx2_fw.h"
 
 #define DRV_MODULE_NAME                "bnx2"
-#define DRV_MODULE_VERSION     "2.0.18"
-#define DRV_MODULE_RELDATE     "Oct 7, 2010"
+#define DRV_MODULE_VERSION     "2.0.20"
+#define DRV_MODULE_RELDATE     "Nov 24, 2010"
 #define FW_MIPS_FILE_06                "bnx2/bnx2-mips-06-6.0.15.fw"
 #define FW_RV2P_FILE_06                "bnx2/bnx2-rv2p-06-6.0.15.fw"
 #define FW_MIPS_FILE_09                "bnx2/bnx2-mips-09-6.0.17.fw"
@@ -4683,7 +4683,7 @@ bnx2_reset_chip(struct bnx2 *bp, u32 reset_code)
                val = BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA |
                      BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP;
 
-               pci_write_config_dword(bp->pdev, BNX2_PCICFG_MISC_CONFIG, val);
+               REG_WR(bp, BNX2_PCICFG_MISC_CONFIG, val);
 
        } else {
                val = BNX2_PCICFG_MISC_CONFIG_CORE_RST_REQ |
@@ -7924,15 +7924,15 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
                goto err_out_release;
        }
 
+       bnx2_set_power_state(bp, PCI_D0);
+
        /* Configure byte swap and enable write to the reg_window registers.
         * Rely on CPU to do target byte swapping on big endian systems
         * The chip's target access swapping will not swap all accesses
         */
-       pci_write_config_dword(bp->pdev, BNX2_PCICFG_MISC_CONFIG,
-                              BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA |
-                              BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP);
-
-       bnx2_set_power_state(bp, PCI_D0);
+       REG_WR(bp, BNX2_PCICFG_MISC_CONFIG,
+                  BNX2_PCICFG_MISC_CONFIG_REG_WINDOW_ENA |
+                  BNX2_PCICFG_MISC_CONFIG_TARGET_MB_WORD_SWAP);
 
        bp->chip_id = REG_RD(bp, BNX2_MISC_ID);