powerpc/mpic: Invert the meaning of MPIC_PRIMARY
authorKyle Moffett <Kyle.D.Moffett@boeing.com>
Fri, 2 Dec 2011 06:28:03 +0000 (06:28 +0000)
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>
Wed, 7 Dec 2011 02:43:08 +0000 (13:43 +1100)
It turns out that there are only 2 in-tree platforms which use MPICs
which are not "primary":  IBM Cell and PowerMac.  To reduce the
complexity of the typical board setup code, invert the MPIC_PRIMARY bit
into MPIC_SECONDARY.

Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
31 files changed:
arch/powerpc/include/asm/mpic.h
arch/powerpc/platforms/44x/iss4xx.c
arch/powerpc/platforms/85xx/corenet_ds.c
arch/powerpc/platforms/85xx/ksi8560.c
arch/powerpc/platforms/85xx/mpc8536_ds.c
arch/powerpc/platforms/85xx/mpc85xx_ads.c
arch/powerpc/platforms/85xx/mpc85xx_cds.c
arch/powerpc/platforms/85xx/mpc85xx_ds.c
arch/powerpc/platforms/85xx/mpc85xx_mds.c
arch/powerpc/platforms/85xx/mpc85xx_rdb.c
arch/powerpc/platforms/85xx/p1010rdb.c
arch/powerpc/platforms/85xx/p1022_ds.c
arch/powerpc/platforms/85xx/p1023_rds.c
arch/powerpc/platforms/85xx/sbc8548.c
arch/powerpc/platforms/85xx/sbc8560.c
arch/powerpc/platforms/85xx/socrates.c
arch/powerpc/platforms/85xx/stx_gp3.c
arch/powerpc/platforms/85xx/tqm85xx.c
arch/powerpc/platforms/85xx/xes_mpc85xx.c
arch/powerpc/platforms/86xx/pic.c
arch/powerpc/platforms/cell/setup.c
arch/powerpc/platforms/chrp/setup.c
arch/powerpc/platforms/embedded6xx/holly.c
arch/powerpc/platforms/embedded6xx/linkstation.c
arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
arch/powerpc/platforms/embedded6xx/storcenter.c
arch/powerpc/platforms/maple/setup.c
arch/powerpc/platforms/pasemi/setup.c
arch/powerpc/platforms/powermac/pic.c
arch/powerpc/platforms/pseries/setup.c
arch/powerpc/sysdev/mpic.c

index ba0b2046106eefb991c9b15072662865547615d7..b9d2c0fb0492356085b1527ff7b0fb386137fdef 100644 (file)
@@ -334,11 +334,11 @@ struct mpic
  * Note setting any ID (leaving those bits to 0) means standard MPIC
  */
 
-/* This is the primary controller, only that one has IPIs and
- * has afinity control. A non-primary MPIC always uses CPU0
- * registers only
+/*
+ * This is a secondary ("chained") controller; it only uses the CPU0
+ * registers.  Primary controllers have IPIs and affinity control.
  */
-#define MPIC_PRIMARY                   0x00000001
+#define MPIC_SECONDARY                 0x00000001
 
 /* Set this for a big-endian MPIC */
 #define MPIC_BIG_ENDIAN                        0x00000002
index 19395f18b1db4a88fe16afac8c1d657954ea335b..5b8cdbb82f80f486733149ddaca8d03012c28d06 100644 (file)
@@ -71,7 +71,7 @@ static void __init iss4xx_init_irq(void)
                /* The MPIC driver will get everything it needs from the
                 * device-tree, just pass 0 to all arguments
                 */
-               struct mpic *mpic = mpic_alloc(np, 0, MPIC_PRIMARY, 0, 0,
+               struct mpic *mpic = mpic_alloc(np, 0, 0, 0, 0,
                                               " MPIC     ");
                BUG_ON(mpic == NULL);
                mpic_init(mpic);
index cfa4bada7eb28e3364f728a696e8ae34fd730ce6..07e3e6c47371f0759f2cb6dd4d640c262ac31155 100644 (file)
@@ -36,7 +36,7 @@
 void __init corenet_ds_pic_init(void)
 {
        struct mpic *mpic;
-       unsigned int flags = MPIC_PRIMARY | MPIC_BIG_ENDIAN |
+       unsigned int flags = MPIC_BIG_ENDIAN |
                                MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU;
 
        if (ppc_md.get_irq == mpic_get_coreint_irq)
index 1620fa87cd9674ad93573f42bc647b985df62a2f..20f75d7819c6776b390a90d0d0689d3f8d9bd201 100644 (file)
@@ -58,7 +58,7 @@ static void machine_restart(char *cmd)
 static void __init ksi8560_pic_init(void)
 {
        struct mpic *mpic = mpic_alloc(NULL, 0,
-                       MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+                       MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
                        0, 256, " OpenPIC  ");
        BUG_ON(mpic == NULL);
        mpic_init(mpic);
index 07916d6e49998d21b7bca9dd8359e32852634015..cf266826682e72ea7ce9dd0c3e8bf5bdf8128f67 100644 (file)
@@ -37,7 +37,7 @@
 void __init mpc8536_ds_pic_init(void)
 {
        struct mpic *mpic = mpic_alloc(NULL, 0,
-                         MPIC_PRIMARY | MPIC_WANTS_RESET |
+                         MPIC_WANTS_RESET |
                          MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
                        0, 256, " OpenPIC  ");
        BUG_ON(mpic == NULL);
index 17c6f06e2d415921e2eb962c0708a4bab519710f..3bebb5173bfcb87f98022d675a911d7c33110975 100644 (file)
@@ -51,7 +51,7 @@ static int mpc85xx_exclude_device(struct pci_controller *hose,
 static void __init mpc85xx_ads_pic_init(void)
 {
        struct mpic *mpic = mpic_alloc(NULL, 0,
-                       MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+                       MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
                        0, 256, " OpenPIC  ");
        BUG_ON(mpic == NULL);
        mpic_init(mpic);
index cf209b3df7b939f370a97aea986b2d60051056b5..40f03da616a9e8c38884f359f12a58c390f115ae 100644 (file)
@@ -189,7 +189,7 @@ static void __init mpc85xx_cds_pic_init(void)
 {
        struct mpic *mpic;
        mpic = mpic_alloc(NULL, 0,
-                       MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+                       MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
                        0, 256, " OpenPIC  ");
        BUG_ON(mpic == NULL);
        mpic_init(mpic);
index 104a09b9f6d35623b93b289b53aa8604dfdfe5e2..eefbb91e1d61cdb5883b5af8c3a5968c93d57de5 100644 (file)
@@ -72,13 +72,12 @@ void __init mpc85xx_ds_pic_init(void)
 
        if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS-CAMP")) {
                mpic = mpic_alloc(NULL, 0,
-                       MPIC_PRIMARY |
                        MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
                        MPIC_SINGLE_DEST_CPU,
                        0, 256, " OpenPIC  ");
        } else {
                mpic = mpic_alloc(NULL, 0,
-                         MPIC_PRIMARY | MPIC_WANTS_RESET |
+                         MPIC_WANTS_RESET |
                          MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
                          MPIC_SINGLE_DEST_CPU,
                        0, 256, " OpenPIC  ");
index 4e5431ad9d1368b1eecec3538a56ee7996d357f3..1d15a0cd2c82dd2110f27e835ede3cefd30f2bbb 100644 (file)
@@ -435,7 +435,7 @@ machine_arch_initcall(p1021_mds, swiotlb_setup_bus_notifier);
 static void __init mpc85xx_mds_pic_init(void)
 {
        struct mpic *mpic = mpic_alloc(NULL, 0,
-                       MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
+                       MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
                        MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU,
                        0, 256, " OpenPIC  ");
        BUG_ON(mpic == NULL);
index a68d92271c443c5bf67a701c9fc4cf0bc16d4534..ccf520e890bee2f209182cf6df3f0b240d0864f9 100644 (file)
@@ -49,13 +49,12 @@ void __init mpc85xx_rdb_pic_init(void)
 
        if (of_flat_dt_is_compatible(root, "fsl,MPC85XXRDB-CAMP")) {
                mpic = mpic_alloc(NULL, 0,
-                       MPIC_PRIMARY |
                        MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
                        MPIC_SINGLE_DEST_CPU,
                        0, 256, " OpenPIC  ");
        } else {
                mpic = mpic_alloc(NULL, 0,
-                 MPIC_PRIMARY | MPIC_WANTS_RESET |
+                 MPIC_WANTS_RESET |
                  MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
                  MPIC_SINGLE_DEST_CPU,
                  0, 256, " OpenPIC  ");
index 25f7375e092f54c8aac3f8d41ec9172e30cb8b90..894f1e84fef85fc45ac86f3ab5be7d2a7e729ff7 100644 (file)
@@ -33,8 +33,8 @@
 void __init p1010_rdb_pic_init(void)
 {
        struct mpic *mpic = mpic_alloc(NULL, 0,
-         MPIC_PRIMARY | MPIC_WANTS_RESET |
-         MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU,
+         MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
+         MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU,
          0, 256, " OpenPIC  ");
 
        BUG_ON(mpic == NULL);
index 6af5502b08983ee5a9205879672558c947a8c767..bb3d84f4046f53342bc0390c02359a73a34d4866 100644 (file)
@@ -242,7 +242,7 @@ p1022ds_valid_monitor_port(enum fsl_diu_monitor_port port)
 void __init p1022_ds_pic_init(void)
 {
        struct mpic *mpic = mpic_alloc(NULL, 0,
-               MPIC_PRIMARY | MPIC_WANTS_RESET |
+               MPIC_WANTS_RESET |
                MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
                MPIC_SINGLE_DEST_CPU,
                0, 256, " OpenPIC  ");
index b3c78fe07110de66320a6b861dea57b0259bf0c9..e92a714d2f3643135ba630fdde89f2131558500c 100644 (file)
@@ -94,7 +94,7 @@ machine_device_initcall(p1023_rds, mpc85xx_common_publish_devices);
 static void __init mpc85xx_rds_pic_init(void)
 {
        struct mpic *mpic = mpic_alloc(NULL, 0,
-               MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
+               MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
                MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU,
                0, 256, " OpenPIC  ");
 
index 38d6945382b82759f6a51e9cff96dfbffdbe4a59..184a50784617fdf1b869138edb6cc72c745a407f 100644 (file)
@@ -55,7 +55,7 @@ static int sbc_rev;
 static void __init sbc8548_pic_init(void)
 {
        struct mpic *mpic = mpic_alloc(NULL, 0,
-                       MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+                       MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
                        0, 256, " OpenPIC  ");
        BUG_ON(mpic == NULL);
        mpic_init(mpic);
index 7e6d7e5b8a412a16280e1919742f5adc2127c9bd..940752e93051718b789772450949d0c25c67a80e 100644 (file)
@@ -42,7 +42,7 @@
 static void __init sbc8560_pic_init(void)
 {
        struct mpic *mpic = mpic_alloc(NULL, 0,
-                       MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+                       MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
                        0, 256, " OpenPIC  ");
        BUG_ON(mpic == NULL);
        mpic_init(mpic);
index 8175f0a5e5f097818c8fad4753eb65895630dc3d..18f635906b2762f8e0a9af23247bdf4c848458f9 100644 (file)
@@ -49,7 +49,7 @@ static void __init socrates_pic_init(void)
        struct device_node *np;
 
        struct mpic *mpic = mpic_alloc(NULL, 0,
-                       MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+                       MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
                        0, 256, " OpenPIC  ");
        BUG_ON(mpic == NULL);
        mpic_init(mpic);
index 8ca1e61488df269a274916ce349adfbb34ab73bb..e9e5234b4e76992ddca5121bf418583f406e5f35 100644 (file)
@@ -49,7 +49,7 @@
 static void __init stx_gp3_pic_init(void)
 {
        struct mpic *mpic = mpic_alloc(NULL, 0,
-                       MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+                       MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
                        0, 256, " OpenPIC  ");
        BUG_ON(mpic == NULL);
        mpic_init(mpic);
index 6e7a8351e8f94f61f24cd96a7b8ddfc74cefc8f9..bf7c89fb75bbf92ebd4eb9efcd707f7fe5c315a1 100644 (file)
@@ -47,7 +47,7 @@
 static void __init tqm85xx_pic_init(void)
 {
        struct mpic *mpic = mpic_alloc(NULL, 0,
-                       MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+                       MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
                        0, 256, " OpenPIC  ");
        BUG_ON(mpic == NULL);
        mpic_init(mpic);
index f94c60868496bf01811fa7507b40f84ea6f39040..3a69f8b77de6f549729832fb6ed3703aa9cfc477 100644 (file)
@@ -44,7 +44,7 @@
 void __init xes_mpc85xx_pic_init(void)
 {
        struct mpic *mpic = mpic_alloc(NULL, 0,
-                         MPIC_PRIMARY | MPIC_WANTS_RESET |
+                         MPIC_WANTS_RESET |
                          MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
                        0, 256, " OpenPIC  ");
        BUG_ON(mpic == NULL);
index ed85b3c8ed186d4c490be9b26fe3732729b86095..52bbfa031531583da870458a2c41207459cd36a1 100644 (file)
@@ -38,9 +38,8 @@ void __init mpc86xx_init_irq(void)
 #endif
 
        struct mpic *mpic = mpic_alloc(NULL, 0,
-                       MPIC_PRIMARY | MPIC_WANTS_RESET |
-                       MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
-                       MPIC_SINGLE_DEST_CPU,
+                       MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
+                       MPIC_BROKEN_FRR_NIRQS | MPIC_SINGLE_DEST_CPU,
                        0, 256, " MPIC     ");
        BUG_ON(mpic == NULL);
 
index 0fc9b7256126612ac51691fcb41fc7a65d52fd0c..cd00ca856038e0072a35ae42bd89a559bc405ba4 100644 (file)
@@ -211,7 +211,7 @@ static void __init mpic_init_IRQ(void)
                /* The MPIC driver will get everything it needs from the
                 * device-tree, just pass 0 to all arguments
                 */
-               mpic = mpic_alloc(dn, 0, 0, 0, 0, " MPIC     ");
+               mpic = mpic_alloc(dn, 0, MPIC_SECONDARY, 0, 0, " MPIC     ");
                if (mpic == NULL)
                        continue;
                mpic_init(mpic);
index 122786498419b11cf5ba344d8ad78dddb0f07d59..f1f17bb2c33cf355b7eed3f6a35d497f99bc7731 100644 (file)
@@ -435,8 +435,7 @@ static void __init chrp_find_openpic(void)
        if (len > 1)
                isu_size = iranges[3];
 
-       chrp_mpic = mpic_alloc(np, opaddr, MPIC_PRIMARY,
-                              isu_size, 0, " MPIC    ");
+       chrp_mpic = mpic_alloc(np, opaddr, 0, isu_size, 0, " MPIC    ");
        if (chrp_mpic == NULL) {
                printk(KERN_ERR "Failed to allocate MPIC structure\n");
                goto bail;
index 5ed00a70a864208af26f1d0ca1a52bdb18f9297b..9cfcf20c05608009176ac419a614050cd5145198 100644 (file)
@@ -155,7 +155,7 @@ static void __init holly_init_IRQ(void)
 #endif
 
        mpic = mpic_alloc(NULL, 0,
-                       MPIC_PRIMARY | MPIC_BIG_ENDIAN | MPIC_WANTS_RESET |
+                       MPIC_BIG_ENDIAN | MPIC_WANTS_RESET |
                        MPIC_SPV_EOI | MPIC_NO_PTHROU_DIS | MPIC_REGSET_TSI108,
                        24,
                        NR_IRQS-4, /* num_sources used */
index 502ff60db96834bf4a6fec7b823637ac045aedb9..bcfad92c9cecbd43f0385303a593ff89fa563df4 100644 (file)
@@ -82,7 +82,7 @@ static void __init linkstation_init_IRQ(void)
 {
        struct mpic *mpic;
 
-       mpic = mpic_alloc(NULL, 0, MPIC_PRIMARY | MPIC_WANTS_RESET,
+       mpic = mpic_alloc(NULL, 0, MPIC_WANTS_RESET,
                        4, 32, " EPIC     ");
        BUG_ON(mpic == NULL);
 
index e0f112790397f45d19ecb307727e8ebc7591f806..f3350d786f5b7177120189bf75a58b28e6ede5b1 100644 (file)
@@ -109,7 +109,7 @@ static void __init mpc7448_hpc2_init_IRQ(void)
 #endif
 
        mpic = mpic_alloc(NULL, 0,
-                       MPIC_PRIMARY | MPIC_BIG_ENDIAN | MPIC_WANTS_RESET |
+                       MPIC_BIG_ENDIAN | MPIC_WANTS_RESET |
                        MPIC_SPV_EOI | MPIC_NO_PTHROU_DIS | MPIC_REGSET_TSI108,
                        24,
                        NR_IRQS-4, /* num_sources used */
index 9bd15dfea57977760a38b8f275f789947e7c1626..afa6388349653ccf85eebbb6a4b391efc5d067a4 100644 (file)
@@ -84,7 +84,7 @@ static void __init storcenter_init_IRQ(void)
 {
        struct mpic *mpic;
 
-       mpic = mpic_alloc(NULL, 0, MPIC_PRIMARY | MPIC_WANTS_RESET,
+       mpic = mpic_alloc(NULL, 0, MPIC_WANTS_RESET,
                        16, 32, " OpenPIC  ");
        BUG_ON(mpic == NULL);
 
index 4c372047c94e86e24b2219eb353dab56f91cbbb4..0bcbfe7b2c55ac53a9c638f1aab86757f4e85081 100644 (file)
@@ -221,7 +221,7 @@ static void __init maple_init_IRQ(void)
        unsigned long openpic_addr = 0;
        int naddr, n, i, opplen, has_isus = 0;
        struct mpic *mpic;
-       unsigned int flags = MPIC_PRIMARY;
+       unsigned int flags = 0;
 
        /* Locate MPIC in the device-tree. Note that there is a bug
         * in Maple device-tree where the type of the controller is
index baf20a913827209533aabd2cd85ff3de9b6e4ae6..98b7a7c1317600f33c75ed5969f5113b77231966 100644 (file)
@@ -224,7 +224,7 @@ static __init void pas_init_IRQ(void)
        openpic_addr = of_read_number(opprop, naddr);
        printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
 
-       mpic_flags = MPIC_PRIMARY | MPIC_LARGE_VECTORS | MPIC_NO_BIAS;
+       mpic_flags = MPIC_LARGE_VECTORS | MPIC_NO_BIAS;
 
        nmiprop = of_get_property(mpic_node, "nmi-source", NULL);
        if (nmiprop)
index 78456fd4416ef7bf49a333b56955c08b40fd8b4d..b962101744e564bfee95ae2cc807f325b1cc0fbe 100644 (file)
@@ -499,7 +499,7 @@ static struct mpic * __init pmac_setup_one_mpic(struct device_node *np,
 {
        const char *name = master ? " MPIC 1   " : " MPIC 2   ";
        struct mpic *mpic;
-       unsigned int flags = master ? MPIC_PRIMARY : 0;
+       unsigned int flags = master ? 0 : MPIC_SECONDARY;
 
        pmac_call_feature(PMAC_FTR_ENABLE_MPIC, np, 0, 0);
 
index c3408ca8855ed665d6e38e0c03a5cc57098df9f9..01df08dbc43c6280dc117e9cfd1e7d6b3393394b 100644 (file)
@@ -192,8 +192,7 @@ static void __init pseries_mpic_init_IRQ(void)
        BUG_ON(openpic_addr == 0);
 
        /* Setup the openpic driver */
-       mpic = mpic_alloc(pSeries_mpic_node, openpic_addr,
-                         MPIC_PRIMARY,
+       mpic = mpic_alloc(pSeries_mpic_node, openpic_addr, 0,
                          16, 250, /* isu size, irq count */
                          " MPIC     ");
        BUG_ON(mpic == NULL);
index bb72a6266480718c4f9c401c20123310f3c459e9..6d42ad1491a90daac9979a0acbee9cf45f70fac3 100644 (file)
@@ -154,7 +154,7 @@ static inline unsigned int mpic_processor_id(struct mpic *mpic)
 {
        unsigned int cpu = 0;
 
-       if (mpic->flags & MPIC_PRIMARY)
+       if (!(mpic->flags & MPIC_SECONDARY))
                cpu = hard_smp_processor_id();
 
        return cpu;
@@ -990,7 +990,7 @@ static int mpic_host_map(struct irq_host *h, unsigned int virq,
 
 #ifdef CONFIG_SMP
        else if (hw >= mpic->ipi_vecs[0]) {
-               WARN_ON(!(mpic->flags & MPIC_PRIMARY));
+               WARN_ON(mpic->flags & MPIC_SECONDARY);
 
                DBG("mpic: mapping as IPI\n");
                irq_set_chip_data(virq, mpic);
@@ -1001,7 +1001,7 @@ static int mpic_host_map(struct irq_host *h, unsigned int virq,
 #endif /* CONFIG_SMP */
 
        if (hw >= mpic->timer_vecs[0] && hw <= mpic->timer_vecs[7]) {
-               WARN_ON(!(mpic->flags & MPIC_PRIMARY));
+               WARN_ON(mpic->flags & MPIC_SECONDARY);
 
                DBG("mpic: mapping as timer\n");
                irq_set_chip_data(virq, mpic);
@@ -1184,12 +1184,12 @@ struct mpic * __init mpic_alloc(struct device_node *node,
 
        mpic->hc_irq = mpic_irq_chip;
        mpic->hc_irq.name = name;
-       if (flags & MPIC_PRIMARY)
+       if (!(flags & MPIC_SECONDARY))
                mpic->hc_irq.irq_set_affinity = mpic_set_affinity;
 #ifdef CONFIG_MPIC_U3_HT_IRQS
        mpic->hc_ht_irq = mpic_irq_ht_chip;
        mpic->hc_ht_irq.name = name;
-       if (flags & MPIC_PRIMARY)
+       if (!(flags & MPIC_SECONDARY))
                mpic->hc_ht_irq.irq_set_affinity = mpic_set_affinity;
 #endif /* CONFIG_MPIC_U3_HT_IRQS */
 
@@ -1375,7 +1375,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
        mpic->next = mpics;
        mpics = mpic;
 
-       if (flags & MPIC_PRIMARY) {
+       if (!(flags & MPIC_SECONDARY)) {
                mpic_primary = mpic;
                irq_set_default_host(mpic->irqhost);
        }
@@ -1450,7 +1450,7 @@ void __init mpic_init(struct mpic *mpic)
 
        /* Do the HT PIC fixups on U3 broken mpic */
        DBG("MPIC flags: %x\n", mpic->flags);
-       if ((mpic->flags & MPIC_U3_HT_IRQS) && (mpic->flags & MPIC_PRIMARY)) {
+       if ((mpic->flags & MPIC_U3_HT_IRQS) && !(mpic->flags & MPIC_SECONDARY)) {
                mpic_scan_ht_pics(mpic);
                mpic_u3msi_init(mpic);
        }