SDMMC: set the supported max/min frequency

diff --git a/arch/arm/boot/dts/rk3188-mmc.dtsi b/arch/arm/boot/dts/rk3188-mmc.dtsi
index 20992232c8c115d795731765b6eaa927074d1bb6..26f33e6164f78cc18de47012cb508246b2a98695 100755 (executable)
--- a/arch/arm/boot/dts/rk3188-mmc.dtsi
+++ b/arch/arm/boot/dts/rk3188-mmc.dtsi
@@ -28,13 +28,17 @@
            pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_wp &sd0_pwr &sd0_bus1 &sd0_bus4>;
                pinctrl-1 = <&sd0_cd_gpio>; //for int gpio?
            clocks = <&clk_gates2 11>;
-           num-slots = <1>;
+            clock-frequency = <500000000>;
+            clock-freq-min-max = <400000 50000000>;        
+
+           num-slots = <1>;
            supports-highspeed;
            broken-cd;
            card-detect-delay = <200>;
            pwr-gpios = <&gpio3 GPIO_A1 GPIO_ACTIVE_LOW>; /*pwr_en = GPIO3_A1*/
-           fifo-depth = <0x80>;
-           mmc,caps = <(MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED)>;
+           fifo-depth = <0x100>;
+           
+            mmc,caps = <(MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED)>;
            mmc,ocr =  <(MMC_VDD_25_26 | MMC_VDD_26_27 | MMC_VDD_27_28 | MMC_VDD_28_29 |
                                 MMC_VDD_29_30 | MMC_VDD_30_31 | MMC_VDD_31_32 | MMC_VDD_32_33 |
                                         MMC_VDD_33_34 | MMC_VDD_34_35 | MMC_VDD_35_36)>;
@@ -52,13 +56,18 @@
            interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
            #address-cells = <1>;
            #size-cells = <0>;
-           pinctrl-names = "default";
+           pinctrl-names = "default","suspend";
            pinctrl-0 = <&sd1_clk &sd1_cmd &sd1_cd &sd1_wp &sd1_bus1 &sd1_bus4>;
-               clocks = <&clk_gates2 14>;
-           num-slots = <1>;
+               
+            clocks = <&clk_gates2 14>;
+            clock-frequency = <500000000>;
+            clock-freq-min-max = <400000 50000000>;
+            
+            num-slots = <1>;
            supports-highspeed;
            fifo-depth = <0x100>;
-           mmc,caps = <(MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ |MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED)>;
+           
+            mmc,caps = <(MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ |MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED)>;
            mmc,ocr =  <(MMC_VDD_25_26 | MMC_VDD_26_27 | MMC_VDD_27_28 | MMC_VDD_28_29 |
                                 MMC_VDD_29_30 | MMC_VDD_30_31 | MMC_VDD_31_32 | MMC_VDD_32_33 |
                                 MMC_VDD_33_34 | MMC_VDD_34_35 )>;
@@ -77,12 +86,17 @@
                interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
                #address-cells = <1>;
                #size-cells = <0>;
-               //pinctrl-names = "default";
+               //pinctrl-names = "default",,"suspend";
                //pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_cd &sd0_wp &sd0_pwr &sd0_bus1 &sd0_bus4>;
                clocks = <&clk_gates2 11>;
-               num-slots = <1>;
+               clock-frequency = <2000000000>;
+                clock-freq-min-max = <400000 200000000>;
+                
+                num-slots = <1>;
                supports-highspeed;
                fifo-depth = <0x100>;
+
+                 
                mmc,caps = <(MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED)>;
                mmc,ocr =  <(MMC_VDD_25_26 | MMC_VDD_26_27 | MMC_VDD_27_28 | MMC_VDD_28_29 |
                                     MMC_VDD_29_30 | MMC_VDD_30_31 | MMC_VDD_31_32 | MMC_VDD_32_33 |

diff --git a/drivers/mmc/host/rk_sdmmc.c b/drivers/mmc/host/rk_sdmmc.c
index 071d444259322621b0064d63b99f236e17edfdb9..e6614285dd251967a60747142b136be9fd6205ba 100755 (executable)
--- a/drivers/mmc/host/rk_sdmmc.c
+++ b/drivers/mmc/host/rk_sdmmc.c
@@ -52,6 +52,9 @@
 #define DW_MCI_RECV_STATUS     2
 #define DW_MCI_DMA_THRESHOLD   16
 
+#define DW_MCI_FREQ_MAX        200000000       /* unit: HZ */
+#define DW_MCI_FREQ_MIN        400000          /* unit: HZ */
+
 #ifdef CONFIG_MMC_DW_IDMAC
 struct idmac_desc {
        u32             des0;   /* Control Descriptor */
@@ -2035,6 +2038,7 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id)
        struct dw_mci_slot *slot;
        const struct dw_mci_drv_data *drv_data = host->drv_data;
        int ctrl_id, ret;
+       u32 freq[2];
        u8 bus_width;
 
        mmc = mmc_alloc_host(sizeof(struct dw_mci_slot), host->dev);
@@ -2050,8 +2054,14 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id)
        slot->quirks = dw_mci_of_get_slot_quirks(host->dev, slot->id);
 
        mmc->ops = &dw_mci_ops;
-       mmc->f_min = DIV_ROUND_UP(host->bus_hz, 510);
-       mmc->f_max = host->bus_hz;
+       if (of_property_read_u32_array(host->dev->of_node,
+                                      "clock-freq-min-max", freq, 2)) {
+               mmc->f_min = DW_MCI_FREQ_MIN;
+               mmc->f_max = DW_MCI_FREQ_MAX;
+       } else {
+               mmc->f_min = freq[0];
+               mmc->f_max = freq[1];
+       }
 
        if (host->pdata->get_ocr)
                mmc->ocr_avail = host->pdata->get_ocr(id);
@@ -2098,9 +2108,6 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id)
                mmc->caps |= MMC_CAP_4_BIT_DATA;
        }
 
-       if (host->pdata->quirks & DW_MCI_QUIRK_HIGHSPEED)
-               mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED;
-
        if (host->pdata->blk_settings) {
                mmc->max_segs = host->pdata->blk_settings->max_segs;
                mmc->max_blk_size = host->pdata->blk_settings->max_blk_size;
@@ -2249,9 +2256,6 @@ static struct dw_mci_of_quirks {
        int id;
 } of_quirks[] = {
        {
-               .quirk  = "supports-highspeed",
-               .id     = DW_MCI_QUIRK_HIGHSPEED,
-       }, {
                .quirk  = "broken-cd",
                .id     = DW_MCI_QUIRK_BROKEN_CARD_DETECTION,
        },

diff --git a/drivers/mmc/host/rk_sdmmc_of.c b/drivers/mmc/host/rk_sdmmc_of.c
index b298af99412bcd941850b8179bd725d18b6e7edc..522420e5c054b55e43f4c5fd4ecab72c02d453f6 100755 (executable)
--- a/drivers/mmc/host/rk_sdmmc_of.c
+++ b/drivers/mmc/host/rk_sdmmc_of.c
@@ -2,7 +2,7 @@
 \r
 static void rockchip_mmc_of_dump(struct rk_sdmmc_of *rk_mmc_property)\r
 {\r
-//printk("%d..%s: =====test====\n", __LINE__, __FUNCTION__);\r
+printk("%d..%s: =====test 2014-03-04 ====\n", __LINE__, __FUNCTION__);\r
 //dump_stack();\r
 \r
     mmc_debug(MMC_DBG_BOOT,"=========rockchip mmc dts dump info start==============\n");\r