Fix PR4188. TailMerging can't tolerate inexact

sucessor info.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71478 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/BranchFolding.cpp b/lib/CodeGen/BranchFolding.cpp
index 583009c74a3b6375175801a9eab558478ff0f642..26353035ae2f8cf84a58806dc16386c7ba48e816 100644 (file)
--- a/lib/CodeGen/BranchFolding.cpp
+++ b/lib/CodeGen/BranchFolding.cpp
@@ -1092,6 +1092,21 @@ void BranchFolder::OptimizeBlock(MachineBasicBlock *MBB) {
             } else {
               DidChange = true;
               PMBB->ReplaceUsesOfBlockWith(MBB, CurTBB);
+              // If this change resulted in PMBB ending in a conditional
+              // branch where both conditions go to the same destination,
+              // change this to an unconditional branch (and fix the CFG).
+              MachineBasicBlock *NewCurTBB = 0, *NewCurFBB = 0;
+              SmallVector<MachineOperand, 4> NewCurCond;
+              bool NewCurUnAnalyzable = TII->AnalyzeBranch(*PMBB, NewCurTBB,
+                      NewCurFBB, NewCurCond, true);
+              if (!NewCurUnAnalyzable && NewCurTBB && NewCurTBB == NewCurFBB) {
+                TII->RemoveBranch(*PMBB);
+                NewCurCond.clear(); 
+                TII->InsertBranch(*PMBB, NewCurTBB, 0, NewCurCond);
+                MadeChange = true;
+                ++NumBranchOpts;
+                PMBB->CorrectExtraCFGEdges(NewCurTBB, NewCurFBB, false);
+              }
             }
           }
 

diff --git a/test/CodeGen/X86/2009-05-11-tailmerge-crash.ll b/test/CodeGen/X86/2009-05-11-tailmerge-crash.ll
new file mode 100644 (file)
index 0000000..8178725
--- /dev/null
+++ b/test/CodeGen/X86/2009-05-11-tailmerge-crash.ll
@@ -0,0 +1,23 @@
+; RUN: llvm-as < %s | llc -march=x86
+; PR4188
+; ModuleID = '<stdin>'
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+target triple = "i386-apple-darwin9.6"
+@g_9 = external global i32             ; <i32*> [#uses=1]
+
+define i32 @int86(i32 %p_87) nounwind {
+entry:
+       %0 = trunc i32 %p_87 to i8              ; <i8> [#uses=1]
+       %1 = icmp ne i8 %0, 0           ; <i1> [#uses=1]
+       br label %bb
+
+bb:            ; preds = %bb.i, %bb, %entry
+       %2 = volatile load i32* @g_9, align 4           ; <i32> [#uses=2]
+       %3 = icmp sgt i32 %2, 1         ; <i1> [#uses=1]
+       %4 = and i1 %3, %1              ; <i1> [#uses=1]
+       br i1 %4, label %bb.i, label %bb
+
+bb.i:          ; preds = %bb
+       %5 = icmp sgt i32 0, %2         ; <i1> [#uses=0]
+       br label %bb
+}