SH: pci-sh7780: enable big-endian operation.
authorThomas Schwinge <thomas@codesourcery.com>
Fri, 9 Mar 2012 16:38:52 +0000 (17:38 +0100)
committerPaul Mundt <lethal@linux-sh.org>
Wed, 28 Mar 2012 05:28:30 +0000 (14:28 +0900)
If in big-endian mode, switch the PCI bus, too.

Tested on both litte-endian and big-endian sh7785lcr.

Signed-off-by: Thomas Schwinge <thomas@codesourcery.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: linux-sh@vger.kernel.org
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
arch/sh/drivers/pci/pci-sh7780.c

index fb8f149907433498d183dda7a7ae9170305f2b14..5a6dab6e27d96deb24353f1e4630594825dc545f 100644 (file)
 #include <asm/mmu.h>
 #include <asm/sizes.h>
 
+#if defined(CONFIG_CPU_BIG_ENDIAN)
+# define PCICR_ENDIANNESS SH4_PCICR_BSWP
+#else
+# define PCICR_ENDIANNESS 0
+#endif
+
+
 static struct resource sh7785_pci_resources[] = {
        {
                .name   = "PCI IO",
@@ -254,7 +261,7 @@ static int __init sh7780_pci_init(void)
        __raw_writel(PCIECR_ENBL, PCIECR);
 
        /* Reset */
-       __raw_writel(SH4_PCICR_PREFIX | SH4_PCICR_PRST,
+       __raw_writel(SH4_PCICR_PREFIX | SH4_PCICR_PRST | PCICR_ENDIANNESS,
                     chan->reg_base + SH4_PCICR);
 
        /*
@@ -290,7 +297,8 @@ static int __init sh7780_pci_init(void)
         * Now throw it in to register initialization mode and
         * start the real work.
         */
-       __raw_writel(SH4_PCICR_PREFIX, chan->reg_base + SH4_PCICR);
+       __raw_writel(SH4_PCICR_PREFIX | PCICR_ENDIANNESS,
+                    chan->reg_base + SH4_PCICR);
 
        memphys = __pa(memory_start);
        memsize = roundup_pow_of_two(memory_end - memory_start);
@@ -380,7 +388,8 @@ static int __init sh7780_pci_init(void)
         * Initialization mode complete, release the control register and
         * enable round robin mode to stop device overruns/starvation.
         */
-       __raw_writel(SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_FTO,
+       __raw_writel(SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_FTO |
+                    PCICR_ENDIANNESS,
                     chan->reg_base + SH4_PCICR);
 
        ret = register_pci_controller(chan);