static struct resource *wdt_irq;\r
static struct clk *wdt_clock;\r
static void __iomem *wdt_base;\r
-static unsigned int wdt_count;\r
static char expect_close;\r
\r
-static DEFINE_SPINLOCK(wdt_lock);\r
\r
/* watchdog control routines */\r
\r
\r
\r
/* functions */\r
-static void rk29_wdt_keepalive(void)\r
+void rk29_wdt_keepalive(void)\r
{\r
- spin_lock(&wdt_lock);\r
writel(0x76, wdt_base + RK29_WDT_CRR);\r
- spin_unlock(&wdt_lock);\r
}\r
\r
static void __rk29_wdt_stop(void)\r
{\r
- unsigned long wtcon = 0;\r
-\r
- wtcon = readl(wdt_base + RK29_WDT_CR);\r
- wtcon &= 0xfffffffe;\r
- writel(wtcon, wdt_base + RK29_WDT_CR);\r
+ rk29_wdt_keepalive(); //feed dog\r
+ writel(0x0a, wdt_base + RK29_WDT_CR);\r
}\r
\r
-static void rk29_wdt_stop(void)\r
+void rk29_wdt_stop(void)\r
{\r
- spin_lock(&wdt_lock);\r
__rk29_wdt_stop();\r
- spin_unlock(&wdt_lock);\r
+ clk_disable(wdt_clock);\r
}\r
\r
-static void rk29_wdt_start(void)\r
-{\r
- unsigned long wtcon = 0;\r
-\r
- spin_lock(&wdt_lock);\r
- __rk29_wdt_stop();\r
- wtcon |= (RK29_WDT_EN << 0) | (RK29_RESPONSE_MODE << 1) | (RK29_RESET_PULSE << 2);\r
- writel(wtcon, wdt_base + RK29_WDT_CR);\r
- spin_unlock(&wdt_lock);\r
-}\r
/* timeout unit us */\r
static int rk29_wdt_set_heartbeat(int timeout)\r
{\r
return 0;\r
}\r
\r
+void rk29_wdt_start(void)\r
+{\r
+ unsigned long wtcon = 0;\r
+ clk_enable(wdt_clock);\r
+ rk29_wdt_set_heartbeat(tmr_margin);\r
+ wtcon |= (RK29_WDT_EN << 0) | (RK29_RESPONSE_MODE << 1) | (RK29_RESET_PULSE << 2);\r
+ writel(wtcon, wdt_base + RK29_WDT_CR);\r
+}\r
+\r
/*\r
* /dev/watchdog handling\r
*/\r
goto err_irq;\r
}\r
\r
- clk_enable(wdt_clock);\r
-\r
- rk29_wdt_set_heartbeat(tmr_margin);\r
-\r
ret = misc_register(&rk29_wdt_miscdev);\r
if (ret) {\r
dev_err(dev, "cannot register miscdev on minor=%d (%d)\n",\r
\r
static int rk29_wdt_resume(struct platform_device *dev)\r
{\r
- rk29_wdt_set_heartbeat(tmr_margin);\r
rk29_wdt_start();\r
return 0;\r
}\r