Remove PointerType from class Target

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28368 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARM.td b/lib/Target/ARM/ARM.td
index a7b7e6ed6036fbce67ffa1cde273478ad0e6de25..3b5b198d71237ce53387b034c5c5646ffb236d41 100644 (file)
--- a/lib/Target/ARM/ARM.td
+++ b/lib/Target/ARM/ARM.td
@@ -40,9 +40,6 @@ def ARMInstrInfo : InstrInfo {
 //===----------------------------------------------------------------------===//
 
 def ARM : Target {
-  // Pointers are 32-bits in size.
-  let PointerType = i32;
-
   // FIXME: Specify callee-saved registers
   let CalleeSavedRegisters = [];
 

diff --git a/lib/Target/Alpha/Alpha.td b/lib/Target/Alpha/Alpha.td
index 80f03fbe8648f338d30004065443336ee57d6137..c6bba45035279163e034db2184f4eb452242f1a8 100644 (file)
--- a/lib/Target/Alpha/Alpha.td
+++ b/lib/Target/Alpha/Alpha.td
@@ -65,9 +65,6 @@ def : Processor<"ev67"   , Alpha21264Itineraries, [FeatureFIX, FeatureCIX]>;
 
 
 def Alpha : Target {
-  // Pointers on Alpha are 64-bits in size.
-  let PointerType = i64;
-
   let CalleeSavedRegisters = 
        //saved regs
        [R9, R10, R11, R12, R13, R14, 

diff --git a/lib/Target/IA64/IA64.td b/lib/Target/IA64/IA64.td
index 30337625c589fb1253edbd05891d75a2db9b2704..aceb30ba2e77733fe4033f59c96ead908497e4a7 100644 (file)
--- a/lib/Target/IA64/IA64.td
+++ b/lib/Target/IA64/IA64.td
@@ -91,10 +91,6 @@ def IA64 : Target {
    */
   ];
 
-  // We don't go anywhere near the LP32 variant of IA64 as 
-  // sometimes seen in (for example) HP-UX
-  let PointerType = i64;
-
   // Our instruction set
   let InstructionSet = IA64InstrInfo;
 

diff --git a/lib/Target/PowerPC/PPC.td b/lib/Target/PowerPC/PPC.td
index 10b9095d7ded8ce04e81e8e1c1f4569947e22a3a..702b5a31d9ab3464f179a9ebcb45cd197612ac9d 100644 (file)
--- a/lib/Target/PowerPC/PPC.td
+++ b/lib/Target/PowerPC/PPC.td
@@ -81,9 +81,6 @@ def PPCInstrInfo : InstrInfo {
 
 
 def PPC : Target {
-  // Pointers on PPC are 32-bits in size.
-  let PointerType = i32;
-
   // Information about the instructions.
   let InstructionSet = PPCInstrInfo;
 

diff --git a/lib/Target/Sparc/Sparc.td b/lib/Target/Sparc/Sparc.td
index aa8b9e2c72a53b32eb807dd1ac3e8513ad2b78f9..38b03a4c0d13c6c33bbfbecb8e4bdfa4a0b36f69 100644 (file)
--- a/lib/Target/Sparc/Sparc.td
+++ b/lib/Target/Sparc/Sparc.td
@@ -75,9 +75,6 @@ def : Proc<"ultrasparc3-vis", [FeatureV9, FeatureV8Deprecated, FeatureVIS]>;
 //===----------------------------------------------------------------------===//
 
 def Sparc : Target {
-  // Pointers are 32-bits in size.
-  let PointerType = i32;
-
   // FIXME: Specify callee-saved registers
   let CalleeSavedRegisters = [];
 

diff --git a/lib/Target/Target.td b/lib/Target/Target.td
index 8fbc58e223c55fe1ba9ffadaaba052c2685ea221..36082db0f4bf205a490f4a749fbd4f87248f82be 100644 (file)
--- a/lib/Target/Target.td
+++ b/lib/Target/Target.td
@@ -271,10 +271,6 @@ class Target {
   // saved registers for a target.
   list<Register> CalleeSavedRegisters = [];
   
-  // PointerType - Specify the value type to be used to represent pointers in
-  // this target.  Typically this is an i32 or i64 type.
-  ValueType PointerType;
-
   // InstructionSet - Instruction set description for this target.
   InstrInfo InstructionSet;
 

diff --git a/lib/Target/X86/X86.td b/lib/Target/X86/X86.td
index aaacc7e671a1b22084c5e0dec40d1827f175ee78..170ec1302c8011406608c90e0d4d8abd088f060b 100644 (file)
--- a/lib/Target/X86/X86.td
+++ b/lib/Target/X86/X86.td
@@ -133,9 +133,6 @@ def X86 : Target {
   // Specify the callee saved registers.
   let CalleeSavedRegisters = [ESI, EDI, EBX, EBP];
 
-  // Yes, pointers are 32-bits in size.
-  let PointerType = i32;
-
   // Information about the instructions...
   let InstructionSet = X86InstrInfo;