Thumb2 assembly parsing and encoding for SHASX/SHSAX.
authorJim Grosbach <grosbach@apple.com>
Thu, 15 Sep 2011 22:34:29 +0000 (22:34 +0000)
committerJim Grosbach <grosbach@apple.com>
Thu, 15 Sep 2011 22:34:29 +0000 (22:34 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139870 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/ARMInstrInfo.td
test/MC/ARM/basic-thumb2-instructions.s

index 72793e0e333e3273fefea5a057ad79cf33b0cd75..c5e4b8653c06e7ace3d6464b80f520351fe08dc3 100644 (file)
@@ -4946,6 +4946,10 @@ def : MnemonicAlias<"srs", "srsia">;
 def : MnemonicAlias<"qsubaddx", "qsax">;
 // SASX == SADDSUBX
 def : MnemonicAlias<"saddsubx", "sasx">;
+// SHASX == SHADDSUBX
+def : MnemonicAlias<"shaddsubx", "shasx">;
+// SHSAX == SHSUBADDX
+def : MnemonicAlias<"shsubaddx", "shsax">;
 
 // LDRSBT/LDRHT/LDRSHT post-index offset if optional.
 // Note that the write-back output register is a dummy operand for MC (it's
index 718189cad4e0d21f26dfb7b7e0b4642d660138f6..466bebf6d756ee6251fe9766766aeb4f4aed0245 100644 (file)
@@ -1678,6 +1678,42 @@ _func:
 @ CHECK: seveq.w                         @ encoding: [0xaf,0xf3,0x04,0x80]
 
 
+@------------------------------------------------------------------------------
+@ SHASX
+@------------------------------------------------------------------------------
+        shasx r4, r8, r2
+        it gt
+        shasxgt r4, r8, r2
+        shaddsubx r4, r8, r2
+        it gt
+        shaddsubxgt r4, r8, r2
+
+@ CHECK: shasx r4, r8, r2              @ encoding: [0xa8,0xfa,0x22,0xf4]
+@ CHECK: it    gt                      @ encoding: [0xc8,0xbf]
+@ CHECK: shasxgt r4, r8, r2             @ encoding: [0xa8,0xfa,0x22,0xf4]
+@ CHECK: shasx r4, r8, r2              @ encoding: [0xa8,0xfa,0x22,0xf4]
+@ CHECK: it    gt                      @ encoding: [0xc8,0xbf]
+@ CHECK: shasxgt r4, r8, r2             @ encoding: [0xa8,0xfa,0x22,0xf4]
+
+
+@------------------------------------------------------------------------------
+@ SHASX
+@------------------------------------------------------------------------------
+        shsax r4, r8, r2
+        it gt
+        shsaxgt r4, r8, r2
+        shsubaddx r4, r8, r2
+        it gt
+        shsubaddxgt r4, r8, r2
+
+@ CHECK: shsax r4, r8, r2              @ encoding: [0xe8,0xfa,0x22,0xf4]
+@ CHECK: it    gt                      @ encoding: [0xc8,0xbf]
+@ CHECK: shsaxgt r4, r8, r2             @ encoding: [0xe8,0xfa,0x22,0xf4]
+@ CHECK: shsax r4, r8, r2              @ encoding: [0xe8,0xfa,0x22,0xf4]
+@ CHECK: it    gt                      @ encoding: [0xc8,0xbf]
+@ CHECK: shsaxgt r4, r8, r2             @ encoding: [0xe8,0xfa,0x22,0xf4]
+
+
 @------------------------------------------------------------------------------
 @ SUB (register)
 @------------------------------------------------------------------------------