32 bit rotate is not twoaddr instruction

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76001 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/SystemZ/SystemZInstrInfo.td b/lib/Target/SystemZ/SystemZInstrInfo.td
index 8a616c5764e246fda52d7c87a8c1dd773c15a2a4..5c8474c6d165e2fdf6ebd0a17dc3cd15928e42a2 100644 (file)
--- a/lib/Target/SystemZ/SystemZInstrInfo.td
+++ b/lib/Target/SystemZ/SystemZInstrInfo.td
@@ -640,9 +640,8 @@ def SRA64ri  : Pseudo<(outs GR64:$dst), (ins GR64:$src, i32imm:$amt),
                        (implicit PSW)]>;
 } // Defs = [PSW]
 
-let isTwoAddress = 1 in
 def ROTL32rri : Pseudo<(outs GR32:$dst), (ins GR32:$src, riaddr32:$amt),
-                       "rll\t{$src, $amt}",
+                       "rll\t{$dst, $src, $amt}",
                        [(set GR32:$dst, (rotl GR32:$src, riaddr32:$amt))]>;
 def ROTL64rri : Pseudo<(outs GR64:$dst), (ins GR64:$src, riaddr:$amt),
                        "rllg\t{$dst, $src, $amt}",