ARM: vexpress: configure CLCD driver device tree support for A9 CoreTile

Configuration for the amba-clcd PL111 driver is added to the A9 CoreTile's DTS
file.

Configuration of the motherboard CLCD driver is disabled in the DTSI files to
prevent duplicate CLCD drivers being registered.

A generic set of CLCD panel descriptions has been split into its own DTSI file.
Currently, only XVGA and VGA monitors are described.

Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Signed-off-by: Jon Medhurst <tixy@linaro.org>

diff --git a/arch/arm/boot/dts/clcd-panels.dtsi b/arch/arm/boot/dts/clcd-panels.dtsi
new file mode 100644 (file)
index 0000000..0b0ff6e
--- /dev/null
+++ b/arch/arm/boot/dts/clcd-panels.dtsi
@@ -0,0 +1,52 @@
+/*
+ * ARM Ltd. Versatile Express
+ *
+ */
+
+/ {
+       panels {
+               panel@0 {
+                       compatible      = "panel";
+                       mode            = "VGA";
+                       refresh         = <60>;
+                       xres            = <640>;
+                       yres            = <480>;
+                       pixclock        = <39721>;
+                       left_margin     = <40>;
+                       right_margin    = <24>;
+                       upper_margin    = <32>;
+                       lower_margin    = <11>;
+                       hsync_len       = <96>;
+                       vsync_len       = <2>;
+                       sync            = <0>;
+                       vmode           = "FB_VMODE_NONINTERLACED";
+
+                       tim2            = "TIM2_BCD", "TIM2_IPC";
+                       cntl            = "CNTL_LCDTFT", "CNTL_BGR", "CNTL_LCDVCOMP(1)";
+                       caps            = "CLCD_CAP_5551", "CLCD_CAP_565", "CLCD_CAP_888";
+                       bpp             = <16>;
+               };
+
+               panel@1 {
+                       compatible      = "panel";
+                       mode            = "XVGA";
+                       refresh         = <60>;
+                       xres            = <1024>;
+                       yres            = <768>;
+                       pixclock        = <15748>;
+                       left_margin     = <152>;
+                       right_margin    = <48>;
+                       upper_margin    = <23>;
+                       lower_margin    = <3>;
+                       hsync_len       = <104>;
+                       vsync_len       = <4>;
+                       sync            = <0>;
+                       vmode           = "FB_VMODE_NONINTERLACED";
+
+                       tim2            = "TIM2_BCD", "TIM2_IPC";
+                       cntl            = "CNTL_LCDTFT", "CNTL_BGR", "CNTL_LCDVCOMP(1)";
+                       caps            = "CLCD_CAP_5551", "CLCD_CAP_565", "CLCD_CAP_888";
+                       bpp             = <16>;
+               };
+       };
+};

diff --git a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
index ac870fb3fa0d459b6639e5965f9cc2daecae14e2..9584232ee6b6c6d5464e7704bea9eddd2e7d80ce 100644 (file)
--- a/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
+++ b/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
@@ -228,6 +228,7 @@
                        };
 
                        clcd@1f0000 {
+                               status = "disabled";
                                compatible = "arm,pl111", "arm,primecell";
                                reg = <0x1f0000 0x1000>;
                                interrupts = <14>;

diff --git a/arch/arm/boot/dts/vexpress-v2m.dtsi b/arch/arm/boot/dts/vexpress-v2m.dtsi
index f1420368355bb2f91715526d4a057660f5480b71..6593398c11ae3ba3c4a51f2c29ef23c4697e5405 100644 (file)
--- a/arch/arm/boot/dts/vexpress-v2m.dtsi
+++ b/arch/arm/boot/dts/vexpress-v2m.dtsi
@@ -227,6 +227,7 @@
                        };
 
                        clcd@1f000 {
+                               status = "disabled";
                                compatible = "arm,pl111", "arm,primecell";
                                reg = <0x1f000 0x1000>;
                                interrupts = <14>;

diff --git a/arch/arm/boot/dts/vexpress-v2p-ca9.dts b/arch/arm/boot/dts/vexpress-v2p-ca9.dts
index 62d9b225dcceec8b27464027cd9dba60640c33f5..f83706bd3f9a87bbe3eb8018eb108fc9f32b4bdb 100644 (file)
--- a/arch/arm/boot/dts/vexpress-v2p-ca9.dts
+++ b/arch/arm/boot/dts/vexpress-v2p-ca9.dts
@@ -9,6 +9,8 @@
 
 /dts-v1/;
 
+/include/ "clcd-panels.dtsi"
+
 / {
        model = "V2P-CA9";
        arm,hbi = <0x191>;
@@ -73,6 +75,8 @@
                interrupts = <0 44 4>;
                clocks = <&oscclk1>, <&oscclk2>;
                clock-names = "clcdclk", "apb_pclk";
+               mode = "XVGA";
+               use_dma = <1>;
        };
 
        memory-controller@100e0000 {