#include <mach/cru.h>\r
\r
#include "usbdev_rk.h"\r
-#include "dwc_otg_regs.h"\r
+#include "dwc_otg_regs.h" \r
+\r
#ifdef CONFIG_ARCH_RK30\r
\r
#define GRF_REG_BASE RK30_GRF_BASE \r
#define USBOTG_SIZE RK30_USBOTG20_SIZE\r
#ifdef CONFIG_ARCH_RK3066B\r
#define USBGRF_SOC_STATUS0 (GRF_REG_BASE+0xac)\r
-#define USBGRF_UOC0_CON2 (GRF_REG_BASE+0x118) // USBGRF_UOC0_CON3\r
-#define USBGRF_UOC1_CON2 (GRF_REG_BASE+0x128) // USBGRF_UOC1_CON3\r
+#define USBGRF_UOC0_CON2 (GRF_REG_BASE+0x114)\r
+#define USBGRF_UOC0_CON3 (GRF_REG_BASE+0x118)\r
+#define USBGRF_UOC1_CON2 (GRF_REG_BASE+0x124)\r
+#define USBGRF_UOC1_CON3 (GRF_REG_BASE+0x128)\r
#else\r
#define USBGRF_SOC_STATUS0 (GRF_REG_BASE+0x15c)\r
#define USBGRF_UOC0_CON2 (GRF_REG_BASE+0x184)\r
void usb20otg_hw_init(void)\r
{\r
#ifndef CONFIG_USB20_HOST\r
- // close USB 2.0 HOST phy and clock\r
- unsigned int * otg_phy_con1 = (unsigned int*)(USBGRF_UOC1_CON2);\r
- *otg_phy_con1 = 0x554|(0xfff<<16); // enter suspend.\r
+ // close USB 2.0 HOST phy and clock\r
+#ifdef CONFIG_ARCH_RK3066B\r
+ unsigned int * otg_phy_con1 = (unsigned int*)(USBGRF_UOC1_CON2);\r
+ unsigned int * otg_phy_con2 = (unsigned int*)(USBGRF_UOC1_CON3);\r
+ *otg_phy_con1 = (0x01<<2)|((0x01<<2)<<16); //enable soft control\r
+ *otg_phy_con2 = 0x2A|(0x3F<<16); // enter suspend \r
+#else\r
+ unsigned int * otg_phy_con1 = (unsigned int*)(USBGRF_UOC1_CON2);\r
+ *otg_phy_con1 = 0x554|(0xfff<<16); // enter suspend.\r
#endif\r
- // usb phy config init\r
-\r
- // other haredware init\r
+#endif\r
+ // usb phy config init\r
+ \r
+ // other haredware init\r
#ifdef CONFIG_ARCH_RK3066B\r
-// conflict with pwm2\r
-// rk30_mux_api_set(GPIO3D5_PWM2_JTAGTCK_OTGDRVVBUS_NAME, GPIO3D_OTGDRVVBUS);\r
+ //GPIO init\r
+ rk30_mux_api_set(GPIO0D6_SPI1CLK_NAME, GPIO0D_GPIO0D6);\r
#else\r
- rk30_mux_api_set(GPIO0A5_OTGDRVVBUS_NAME, GPIO0A_OTG_DRV_VBUS);\r
+ rk30_mux_api_set(GPIO0A5_OTGDRVVBUS_NAME, GPIO0A_OTG_DRV_VBUS);\r
#endif\r
}\r
+\r
void usb20otg_phy_suspend(void* pdata, int suspend)\r
{\r
- struct dwc_otg_platform_data *usbpdata=pdata;\r
- unsigned int * otg_phy_con1 = (unsigned int*)(USBGRF_UOC0_CON2);\r
- if(suspend){\r
- *otg_phy_con1 = 0x554|(0xfff<<16); // enter suspend.\r
- usbpdata->phy_status = 1;\r
- }\r
- else{\r
- *otg_phy_con1 = ((0x01<<2)<<16); // exit suspend.\r
- usbpdata->phy_status = 0;\r
- }\r
+#ifdef CONFIG_ARCH_RK3066B\r
+ struct dwc_otg_platform_data *usbpdata=pdata;\r
+ unsigned int * otg_phy_con1 = (unsigned int*)(USBGRF_UOC0_CON2);\r
+ unsigned int * otg_phy_con2 = (unsigned int*)(USBGRF_UOC0_CON3);\r
+ if(suspend){\r
+ *otg_phy_con1 = (0x01<<2)|((0x01<<2)<<16); ; //enable soft control\r
+ *otg_phy_con2 = 0x2A|(0x3F<<16);; // enter suspend\r
+ usbpdata->phy_status = 1;\r
+ }\r
+ else{\r
+ *otg_phy_con1 = ((0x01<<2)<<16); // exit suspend.\r
+ usbpdata->phy_status = 0;\r
+ }\r
+#else\r
+ struct dwc_otg_platform_data *usbpdata=pdata;\r
+ unsigned int * otg_phy_con1 = (unsigned int*)(USBGRF_UOC0_CON2);\r
+ if(suspend){\r
+ *otg_phy_con1 = 0x554|(0xfff<<16); // enter suspend.\r
+ usbpdata->phy_status = 1;\r
+ }\r
+ else{\r
+ *otg_phy_con1 = ((0x01<<2)<<16); // exit suspend.\r
+ usbpdata->phy_status = 0;\r
+ }\r
+#endif\r
+\r
}\r
void usb20otg_soft_reset(void)\r
{\r
}\r
int usb20otg_get_status(int id)\r
{\r
- int ret = -1;\r
- unsigned int usbgrf_status = *(unsigned int*)(USBGRF_SOC_STATUS0);\r
- switch(id)\r
- {\r
+ int ret = -1;\r
+ unsigned int usbgrf_status = *(unsigned int*)(USBGRF_SOC_STATUS0);\r
+ switch(id)\r
+ {\r
#ifdef CONFIG_ARCH_RK3066B\r
- case USB_STATUS_BVABLID:\r
- // bvalid in grf\r
- ret = (usbgrf_status &(1<<10));\r
- break;\r
- case USB_STATUS_DPDM:\r
- // dpdm in grf\r
- ret = (usbgrf_status &(3<<11));\r
- break;\r
- case USB_STATUS_ID:\r
- // id in grf\r
- ret = (usbgrf_status &(1<<13));\r
- break;\r
+ case USB_STATUS_BVABLID:\r
+ // bvalid in grf\r
+ ret = (usbgrf_status &(1<<10));\r
+ break;\r
+ case USB_STATUS_DPDM:\r
+ // dpdm in grf\r
+ ret = (usbgrf_status &(3<<11));\r
+ break;\r
+ case USB_STATUS_ID:\r
+ // id in grf\r
+ ret = (usbgrf_status &(1<<13));\r
+ break;\r
#else\r
- case USB_STATUS_BVABLID:\r
- // bvalid in grf\r
- ret = (usbgrf_status &0x20000);\r
- break;\r
- case USB_STATUS_DPDM:\r
- // dpdm in grf\r
- ret = (usbgrf_status &(3<<18));\r
- break;\r
- case USB_STATUS_ID:\r
- // id in grf\r
- ret = (usbgrf_status &(1<<20));\r
- break;\r
+ case USB_STATUS_BVABLID:\r
+ // bvalid in grf\r
+ ret = (usbgrf_status &0x20000);\r
+ break;\r
+ case USB_STATUS_DPDM:\r
+ // dpdm in grf\r
+ ret = (usbgrf_status &(3<<18));\r
+ break;\r
+ case USB_STATUS_ID:\r
+ // id in grf\r
+ ret = (usbgrf_status &(1<<20));\r
+ break;\r
#endif\r
- default:\r
- break;\r
- }\r
- return ret;\r
+ default:\r
+ break;\r
+ }\r
+ return ret;\r
}\r
+ \r
void usb20otg_power_enable(int enable)\r
{\r
+ int ret;\r
+ if(0 == enable)//disable\r
+ {\r
+ /* ret = gpio_request(RK30_PIN0_PD6, NULL);\r
+ if (ret != 0) {\r
+ gpio_free(RK30_PIN0_PD6);\r
+ }\r
+ gpio_direction_output(RK30_PIN0_PD6, 1);\r
+ gpio_set_value(RK30_PIN0_PD6, 0);*/ \r
+ }\r
+\r
+ if(1 == enable)//enable\r
+ {\r
+ ret = gpio_request(RK30_PIN0_PD6, NULL);\r
+ if (ret != 0) {\r
+ gpio_free(RK30_PIN0_PD6);\r
+ }\r
+ gpio_direction_output(RK30_PIN0_PD6, 1);\r
+ gpio_set_value(RK30_PIN0_PD6, 1); \r
+ } \r
+\r
}\r
struct dwc_otg_platform_data usb20otg_pdata = {\r
.phyclk = NULL,\r
.clock_init=usb20otg_clock_init,\r
.clock_enable=usb20otg_clock_enable,\r
.get_status=usb20otg_get_status,\r
+ .power_enable=usb20otg_power_enable,\r
+ \r
};\r
\r
struct platform_device device_usb20_otg = {\r
\r
// other haredware init\r
#ifdef CONFIG_ARCH_RK3066B\r
- rk30_mux_api_set(GPIO3D6_PWM3_JTAGTMS_HOSTDRVVBUS_NAME, GPIO3D_HOSTDRVVBUS);\r
+ rk30_mux_api_set(GPIO0D7_SPI1CSN0_NAME, GPIO0D_GPIO0D7); \r
#else\r
rk30_mux_api_set(GPIO0A6_HOSTDRVVBUS_NAME, GPIO0A_HOST_DRV_VBUS);\r
#endif\r
}\r
void usb20host_phy_suspend(void* pdata, int suspend)\r
-{\r
- struct dwc_otg_platform_data *usbpdata=pdata;\r
- unsigned int * otg_phy_con1 = (unsigned int*)(USBGRF_UOC1_CON2);\r
- if(suspend){\r
- *otg_phy_con1 = 0x554|(0xfff<<16); // enter suspend.\r
- usbpdata->phy_status = 1;\r
- }\r
- else{\r
- *otg_phy_con1 = ((0x01<<2)<<16); // exit suspend.\r
- usbpdata->phy_status = 0;\r
- }\r
+{ \r
+#ifdef CONFIG_ARCH_RK3066B\r
+ struct dwc_otg_platform_data *usbpdata=pdata;\r
+ unsigned int * otg_phy_con1 = (unsigned int*)(USBGRF_UOC1_CON2);\r
+ unsigned int * otg_phy_con2 = (unsigned int*)(USBGRF_UOC1_CON3);\r
+ if(suspend)\r
+ {\r
+ *otg_phy_con1 = (0x01<<2)|((0x01<<2)<<16); ; //enable soft control\r
+ *otg_phy_con2 = 0x2A|(0x3F<<16);; // enter suspend\r
+ usbpdata->phy_status = 1;\r
+ }\r
+ else\r
+ {\r
+ *otg_phy_con1 = ((0x01<<2)<<16); // exit suspend.\r
+ usbpdata->phy_status = 0;\r
+ } \r
+#else\r
+ struct dwc_otg_platform_data *usbpdata=pdata;\r
+ unsigned int * otg_phy_con1 = (unsigned int*)(USBGRF_UOC1_CON2);\r
+ if(suspend)\r
+ {\r
+ *otg_phy_con1 = 0x554|(0xfff<<16); // enter suspend.\r
+ usbpdata->phy_status = 1;\r
+ }\r
+ else\r
+ {\r
+ *otg_phy_con1 = ((0x01<<2)<<16); // exit suspend.\r
+ usbpdata->phy_status = 0;\r
+ }\r
+#endif \r
}\r
void usb20host_soft_reset(void)\r
{\r
}\r
void usb20host_power_enable(int enable)\r
{\r
+\r
+ int ret;\r
+ if(0 == enable)//disable\r
+ {\r
+ //ret = gpio_request(RK30_PIN0_PD7, NULL);\r
+ //if (ret != 0) {\r
+ // gpio_free(RK30_PIN0_PD7);\r
+ //}\r
+ //gpio_direction_output(RK30_PIN0_PD7, 1);\r
+ //gpio_set_value(RK30_PIN0_PD7, 0);\r
+ //printk("!!!!!!!!!!!!!!!!!!!disable host power!!!!!!!!!!!!!!!!!!\n");\r
+ }\r
+\r
+ if(1 == enable)//enable\r
+ {\r
+ ret = gpio_request(RK30_PIN0_PD7, NULL);\r
+ if (ret != 0) {\r
+ gpio_free(RK30_PIN0_PD7);\r
+ }\r
+ gpio_direction_output(RK30_PIN0_PD7, 1);\r
+ gpio_set_value(RK30_PIN0_PD7, 1);\r
+ //printk("!!!!!!!!!!!!!!!!!!!!!enable host power!!!!!!!!!!!!!!!!!!\n");\r
+ } \r
}\r
struct dwc_otg_platform_data usb20host_pdata = {\r
.phyclk = NULL,\r
.clock_init=usb20host_clock_init,\r
.clock_enable=usb20host_clock_enable,\r
.get_status=usb20host_get_status,\r
+ .power_enable=usb20host_power_enable,\r
};\r
\r
struct platform_device device_usb20_host = {\r