Make scheduling class variables be 'unsigned' instead of 'int'

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4334 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/Target/MachineInstrInfo.h b/include/llvm/Target/MachineInstrInfo.h
index 8fe4d3b4f6f9fa4a1534367feea621002eee29cb..bc726f99bfd0667de0ddcd6a3e8dafc15a650a53 100644 (file)
--- a/include/llvm/Target/MachineInstrInfo.h
+++ b/include/llvm/Target/MachineInstrInfo.h
@@ -13,7 +13,6 @@
 #include "llvm/DerivedTypes.h"
 
 class MachineInstrDescriptor;
-class TmpInstruction;
 class MachineInstr;
 class TargetMachine;
 class Value;
@@ -27,7 +26,7 @@ class MachineCodeForInstruction;
 
 typedef int MachineOpCode;
 typedef int OpCodeMask;
-typedef int InstrSchedClass;
+typedef unsigned InstrSchedClass;
 
 const MachineOpCode INVALID_MACHINE_OPCODE = -1;
 

diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h
index 8fe4d3b4f6f9fa4a1534367feea621002eee29cb..bc726f99bfd0667de0ddcd6a3e8dafc15a650a53 100644 (file)
--- a/include/llvm/Target/TargetInstrInfo.h
+++ b/include/llvm/Target/TargetInstrInfo.h
@@ -13,7 +13,6 @@
 #include "llvm/DerivedTypes.h"
 
 class MachineInstrDescriptor;
-class TmpInstruction;
 class MachineInstr;
 class TargetMachine;
 class Value;
@@ -27,7 +26,7 @@ class MachineCodeForInstruction;
 
 typedef int MachineOpCode;
 typedef int OpCodeMask;
-typedef int InstrSchedClass;
+typedef unsigned InstrSchedClass;
 
 const MachineOpCode INVALID_MACHINE_OPCODE = -1;
 

diff --git a/include/llvm/Target/TargetSchedInfo.h b/include/llvm/Target/TargetSchedInfo.h
index 48da1c1d3ba1ff185cd3eccd213a739cfcf06bfb..9d894751d23f25e949293ee896c521b5a8d5bafd 100644 (file)
--- a/include/llvm/Target/TargetSchedInfo.h
+++ b/include/llvm/Target/TargetSchedInfo.h
@@ -196,9 +196,8 @@ protected:
     assert(opCode >= 0 && opCode < (int) instrRUsages.size());
     return instrRUsages[opCode];
   }
-  inline const InstrClassRUsage&
-                       getClassRUsage(const InstrSchedClass& sc) const {
-    assert(sc >= 0 && sc < numSchedClasses);
+  const InstrClassRUsage& getClassRUsage(const InstrSchedClass& sc) const {
+    assert(sc < numSchedClasses);
     return classRUsages[sc];
   }
   
@@ -225,7 +224,7 @@ public:
   }
   
   inline  unsigned getMaxIssueForClass(const InstrSchedClass& sc) const {
-    assert(sc >= 0 && sc < numSchedClasses);
+    assert(sc < numSchedClasses);
     return classRUsages[sc].maxNumIssue;
   }
 
@@ -283,7 +282,7 @@ private:
   }
   
 protected:
-  int                     numSchedClasses;
+  unsigned                numSchedClasses;
   const MachineInstrInfo*  mii;
   const        InstrClassRUsage*  classRUsages;        // raw array by sclass
   const        InstrRUsageDelta*  usageDeltas;         // raw array [1:numUsageDeltas]