Fix 80 col violations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62518 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index c43acdb5c2e3f3102492b5de197e234bf1b63a28..6ad183f8caa45fdc73c4ab06032b2b8e977ff2c9 100644 (file)
--- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -1114,8 +1114,8 @@ SDNode *PPCDAGToDAGISel::Select(SDValue Op) {
           N2.getOperand(1).getOpcode() == PPCISD::Lo)
         N2 = N2.getOperand(0).getOperand(1).getOperand(0);
       else if (N2.getOperand(0).getOpcode() == ISD::ADD &&
-               N2.getOperand(0).getOperand(0).getOpcode() == PPCISD::GlobalBaseReg &&
-               N2.getOperand(0).getOperand(1).getOpcode() == PPCISD::Lo &&
+          N2.getOperand(0).getOperand(0).getOpcode() == PPCISD::GlobalBaseReg &&
+          N2.getOperand(0).getOperand(1).getOpcode() == PPCISD::Lo &&
                N2.getOperand(1).getOpcode() == PPCISD::Hi)
         N2 = N2.getOperand(0).getOperand(1).getOperand(0);
       else if (N2.getOperand(0).getOpcode() == PPCISD::Hi &&