Clang tries to check the clobber list but doesn't list segment registers in its
x86 register list. This fixes PR20343.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213303
91177308-0d34-0410-b5e6-
96231b3b80d8
unsigned &ErrorInfo,
bool MatchingInlineAsm) = 0;
+ /// Allows targets to let registers opt out of clobber lists.
+ virtual bool OmitRegisterFromClobberLists(unsigned RegNo) { return false; }
+
/// Allow a target to add special case operand matching for things that
/// tblgen doesn't/can't handle effectively. For example, literal
/// immediates on ARM. TableGen expects a token operand, but the parser
continue;
// Register operand.
- if (Operand.isReg() && !Operand.needAddressOf()) {
+ if (Operand.isReg() && !Operand.needAddressOf() &&
+ !getTargetParser().OmitRegisterFromClobberLists(Operand.getReg())) {
unsigned NumDefs = Desc.getNumDefs();
// Clobber.
if (NumDefs && Operand.getMCOperandNum() < NumDefs)
unsigned &ErrorInfo,
bool MatchingInlineAsm) override;
+ virtual bool OmitRegisterFromClobberLists(unsigned RegNo) override;
+
/// doSrcDstMatch - Returns true if operands are matching in their
/// word size (%si and %di, %esi and %edi, etc.). Order depends on
/// the parsing mode (Intel vs. AT&T).
return true;
}
+bool X86AsmParser::OmitRegisterFromClobberLists(unsigned RegNo) {
+ return X86MCRegisterClasses[X86::SEGMENT_REGRegClassID].contains(RegNo);
+}
bool X86AsmParser::ParseDirective(AsmToken DirectiveID) {
StringRef IDVal = DirectiveID.getIdentifier();