#ifndef __PLAT_GPIO_H
#define __PLAT_GPIO_H
+/*
+ * tp_int = <bank><goff><off><driving force><wake_en><irq_flags><reserve>
+ * tp_rst = <bank><goff><off><driving force><active_low><pull_mode><reserve>
+ * gpio = RKXX_PIN(bank)_P(goff)(off)
+ * e.g. bank=2, goff=A, off=3 ==>gpio is RKXX_PIN2_PA3
+ */
+struct irq_config{
+#if defined(__LITTLE_ENDIAN_BITFIELD)
+ unsigned int off:4, //bit[3:0]
+ goff:4,
+ bank:4,
+ driving_force:4,
+ wake_en:4,
+ irq_flags:4,
+ reserve:8;
+
+
+#else
+#error "Adjust your <asm/byteorder.h> defines"
+#endif
+};
+struct gpio_config{
+#if defined(__LITTLE_ENDIAN_BITFIELD)
+ unsigned int off:4, //bit[3:0]
+ goff:4,
+ bank:4,
+ driving_force:4,
+ active_low:4,
+ pull_mode:4,
+ reserve:8;
+#else
+#error "Adjust your <asm/byteorder.h> defines"
+#endif
+};
+
+#if defined(CONFIG_ARCH_RK2928)
+#define PORT_BASE RK2928_PIN0_PA0
+#elif defined(CONFIG_ARCH_RK30)
+#define PORT_BASE RK30_PIN0_PA0
+#elif defined(CONFIG_ARCH_RK29)
+#define PORT_BASE RK29_PIN0_PA0
+#else
+#error "Arm system type is not support"
+#endif
+
+
+struct port_config {
+ union{
+ struct irq_config irq;
+ struct gpio_config io;
+ unsigned int v;
+ };
+ int gpio;
+};
+static inline struct port_config get_port_config(unsigned int value)
+{
+ struct port_config port;
+
+ port.v = value;
+ port.gpio = PORT_BASE + port.io.bank * 32 + (port.io.goff - 0x0A) * 8 + port.io.off;
+
+ return port;
+}
+
typedef enum eGPIOPinLevel
{
GPIO_LOW=0,