rk29: enable reset while panic

diff --git a/arch/arm/mach-rk29/reset.c b/arch/arm/mach-rk29/reset.c
index 24773683fde05b27e0c669968e894659d089710b..ed869c63c866a8a59f5d006aa98314cac712bcb4 100755 (executable)
--- a/arch/arm/mach-rk29/reset.c
+++ b/arch/arm/mach-rk29/reset.c
@@ -126,10 +126,6 @@ void  rk29_arch_reset(int mode, const char *cmd)
        cru_writel((cru_readl(CRU_MODE_CON) & ~CRU_CPU_MODE_MASK) | CRU_CPU_MODE_SLOW, CRU_MODE_CON);\r
        LOOP(LOOPS_PER_USEC);\r
 \r
-       /* from panic? */\r
-       if (system_state != SYSTEM_RESTART)\r
-               machine_power_off();\r
-\r
        pwm2gpiodefault();\r
 \r
        cru_writel((cru_readl(CRU_MODE_CON) & ~CRU_GENERAL_MODE_MASK) | CRU_GENERAL_MODE_SLOW, CRU_MODE_CON);\r
@@ -183,9 +179,9 @@ void  rk29_arch_reset(int mode, const char *cmd)
        cru_writel((cru_readl(CRU_CLKSEL8_CON) & ~(7 | (0x3f << 14) | (3 << 20))) | (2 << 20), CRU_CLKSEL8_CON);\r
 \r
        // remap bit control = 0, normal mode\r
-       writel(readl(RK29_GRF_PHYS + 0xc0) & ~(1 << 21), RK29_GRF_PHYS + 0xc0);\r
+       writel(readl(RK29_GRF_BASE + 0xc0) & ~(1 << 21), RK29_GRF_BASE + 0xc0);\r
        // emmc_and_boot_en control=0, normal mode\r
-       writel(readl(RK29_GRF_PHYS + 0xbc) & ~(1 << 9), RK29_GRF_PHYS + 0xbc);\r
+       writel(readl(RK29_GRF_BASE + 0xbc) & ~(1 << 9), RK29_GRF_BASE + 0xbc);\r
        dsb();\r
 \r
        writel(0, RK29_CPU_AXI_BUS0_PHYS);\r