pldata = core_if->otg_dev->pldata;
guid.d32 = core_if->core_global_regs->guid;
- if ((cpu_is_rk3288()) && ((guid.d32 & 0x01) == 0)) {
+ if ((is_rk3288_usb()) && ((guid.d32 & 0x01) == 0)) {
/* only used for HOST20, OTG HOST do not need.
* first, do soft reset usb phy, and then usb phy
* can drive resume signal.
struct rkehci_platform_data *pldata_ehci;
#endif
- if (cpu_is_rk3288()) {
+ if (is_rk3288_usb()) {
#ifdef CONFIG_RK_USB_UART
/* enable USB bypass UART function */
writel_relaxed(0x00c00000 | usb_to_uart_status,
struct rkehci_platform_data *pldata_ehci;
#endif
- if (cpu_is_rk3288()) {
+ if (is_rk3288_usb()) {
#ifdef CONFIG_RK_USB_UART
/* disable USB bypass UART function */
usb_to_uart_status =
char name[32];
struct rkehci_platform_data *pdata;
};
+
+#ifdef CONFIG_ARM
+int is_rk3288_usb(void);
+#else
+static inline int is_rk3288_usb(void)
+{
+ return false;
+}
+#endif
#endif
#include "dwc_otg_regs.h"
static struct dwc_otg_control_usb *control_usb;
+int is_rk3288_usb(void)
+{
+ if (!control_usb)
+ return false;
+
+ return control_usb->chip_id == RK3288_USB_CTLR ? true : false;
+}
+
#ifdef CONFIG_USB20_OTG
static void usb20otg_hw_init(void)
{