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Fix a bunch more alpha regressions
author
Andrew Lenharth
<andrewl@lenharth.org>
Fri, 11 Nov 2005 19:52:25 +0000
(19:52 +0000)
committer
Andrew Lenharth
<andrewl@lenharth.org>
Fri, 11 Nov 2005 19:52:25 +0000
(19:52 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24304
91177308
-0d34-0410-b5e6-
96231b3b80d8
lib/Target/Alpha/AlphaISelPattern.cpp
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diff --git
a/lib/Target/Alpha/AlphaISelPattern.cpp
b/lib/Target/Alpha/AlphaISelPattern.cpp
index 791fcedccdeacb8077be78a17f4c2237e697950a..3218f03d6394562797603bd64aeb35b39c7bbf5f 100644
(file)
--- a/
lib/Target/Alpha/AlphaISelPattern.cpp
+++ b/
lib/Target/Alpha/AlphaISelPattern.cpp
@@
-1533,7
+1533,7
@@
unsigned AlphaISel::SelectExpr(SDOperand N) {
N.getOperand(0).getValueType() == MVT::f32 &&
"only f32 to f64 conversion supported here");
Tmp1 = SelectExpr(N.getOperand(0));
- BuildMI(BB, Alpha::CVTST, 1, Result).addReg(
Alpha::F31).addReg(
Tmp1);
+ BuildMI(BB, Alpha::CVTST, 1, Result).addReg(Tmp1);
return Result;
case ISD::ConstantFP: