break;
case ISD::FADD: R = SoftenFloatRes_FADD(N); break;
case ISD::FCOPYSIGN: R = SoftenFloatRes_FCOPYSIGN(N); break;
+ case ISD::FDIV: R = SoftenFloatRes_FDIV(N); break;
case ISD::FMUL: R = SoftenFloatRes_FMUL(N); break;
case ISD::FP_EXTEND: R = SoftenFloatRes_FP_EXTEND(N); break;
case ISD::FP_ROUND: R = SoftenFloatRes_FP_ROUND(N); break;
return DAG.getNode(ISD::OR, LVT, LHS, SignBit);
}
+SDOperand DAGTypeLegalizer::SoftenFloatRes_FDIV(SDNode *N) {
+ MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
+ SDOperand Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
+ GetSoftenedFloat(N->getOperand(1)) };
+ return MakeLibCall(GetFPLibCall(N->getValueType(0),
+ RTLIB::DIV_F32,
+ RTLIB::DIV_F64,
+ RTLIB::DIV_F80,
+ RTLIB::DIV_PPCF128),
+ NVT, Ops, 2, false);
+}
+
SDOperand DAGTypeLegalizer::SoftenFloatRes_FMUL(SDNode *N) {
MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
SDOperand Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
SDOperand SoftenFloatRes_ConstantFP(ConstantFPSDNode *N);
SDOperand SoftenFloatRes_FADD(SDNode *N);
SDOperand SoftenFloatRes_FCOPYSIGN(SDNode *N);
+ SDOperand SoftenFloatRes_FDIV(SDNode *N);
SDOperand SoftenFloatRes_FMUL(SDNode *N);
SDOperand SoftenFloatRes_FP_EXTEND(SDNode *N);
SDOperand SoftenFloatRes_FP_ROUND(SDNode *N);
--- /dev/null
+; RUN: llvm-as < %s | llc -march=arm
+
+define float @f(float %a, float %b) nounwind {
+ %tmp = fdiv float %a, %b
+ ret float %tmp
+}