//WAIT_ME();
while(!(pDDR_Reg->CTRL_REG_03 & 0x100));
pDDR_Reg->CTRL_REG_10 &= ~(0x1);
+ if(memType == DDRII)
+ {
+ if(333000 < KHz)
+ {
+ pDDR_Reg->CTRL_REG_82 = 0x00885555;
+ }
+ else
+ {
+ pDDR_Reg->CTRL_REG_82 = 0x00685555;
+ }
+ }
+ else
+ {
+ if(133000 < KHz)
+ {
+ pDDR_Reg->CTRL_REG_82 = 0x00840000;
+ }
+ else
+ {
+ pDDR_Reg->CTRL_REG_82 = 0x00640000;
+ }
+ }
if(110000 > KHz)
{
DLLBypass(KHz);
#endif
return 0;
}
-//core_initcall_sync(update_frq);
+core_initcall_sync(update_frq);
#endif //endi of #ifdef DRIVERS_SDRAM