add prescale mode | dim mode support

diff --git a/drivers/video/rockchip/rga/RGA_API.c b/drivers/video/rockchip/rga/RGA_API.c
index 337c730c583aaaf0e35536aa195c33894e8a232d..b97337213dac71bff4f31cb55a21f2df0286a27e 100755 (executable)
--- a/drivers/video/rockchip/rga/RGA_API.c
+++ b/drivers/video/rockchip/rga/RGA_API.c
@@ -148,7 +148,7 @@ uint32_t RGA_gen_two_pro(struct rga_req *msg, struct rga_req *msg1)
     msg->dst.act_h = dah;\r
     msg->dst.vir_h = dah;\r
             \r
-    //msg->dst.yrgb_addr = (u32)rga_service.pre_scale_buf;\r
+    msg->dst.yrgb_addr = (u32)rga_service.pre_scale_buf;\r
     msg->dst.uv_addr = msg->dst.yrgb_addr + stride * dah;\r
     msg->dst.v_addr = msg->dst.uv_addr + ((stride * dah) >> 1);\r
 \r

diff --git a/drivers/video/rockchip/rga/rga_drv.c b/drivers/video/rockchip/rga/rga_drv.c
index 49c5648cb2e90e3ad61b26479907622ba8c79a06..da86236711e0b2c1b5b795447cf271b225961611 100755 (executable)
--- a/drivers/video/rockchip/rga/rga_drv.c
+++ b/drivers/video/rockchip/rga/rga_drv.c
@@ -49,10 +49,10 @@
 #include "rga_mmu_info.h"\r
 #include "RGA_API.h"\r
 \r
-#include "bug_320x240_swap0_ABGR8888.h"\r
+//#include "bug_320x240_swap0_ABGR8888.h"\r
 \r
 \r
-#define RGA_TEST 0\r\r
+#define RGA_TEST 0\r
 #define RGA_TEST_TIME 0\r
 \r
 #define PRE_SCALE_BUF_SIZE  2048*1024*4\r
@@ -152,7 +152,6 @@ static void rga_soft_reset(void)
                ERR("soft reset timeout.\n");\r
 }\r
 \r
-\r
 static void rga_dump(void)\r
 {\r
        int running;\r
@@ -405,13 +404,7 @@ static struct rga_reg * rga_reg_init(rga_session *session, struct rga_req *req)
             return NULL; \r
         }\r
     }\r
-\r
-    #if RGA_TEST_TIME\r
-    rga_end = ktime_get();\r
-    rga_end = ktime_sub(rga_end, rga_start);\r
-    printk("one cmd end time %d\n", (int)ktime_to_us(rga_end));\r
-    #endif\r
-    \r
+        \r
     RGA_gen_reg_info(req, (uint8_t *)reg->cmd_reg);\r
 \r
     spin_lock_irqsave(&rga_service.lock, flag);\r
@@ -465,6 +458,7 @@ static struct rga_reg * rga_reg_init_2(rga_session *session, struct rga_req *req
         \r
         RGA_gen_reg_info(req0, (uint8_t *)reg0->cmd_reg);\r
 \r
+        \r
         if(req1->mmu_info.mmu_en)\r
         {\r
             ret = rga_set_mmu_info(reg1, req1);\r
@@ -473,17 +467,9 @@ static struct rga_reg * rga_reg_init_2(rga_session *session, struct rga_req *req
                 break;        \r
             }\r
         }\r
-        \r
+                \r
         RGA_gen_reg_info(req1, (uint8_t *)reg1->cmd_reg);\r
-\r
-        {\r
-            uint32_t i;\r
-            for(i=0; i<28; i++)\r
-            {\r
-                printk("reg1->cmd_reg[%d] is %.8x\n", i, reg1->cmd_reg[i]);\r
-            }\r
-        }\r
-\r
+        \r
         spin_lock_irqsave(&rga_service.lock, flag);\r
        list_add_tail(&reg0->status_link, &rga_service.waiting);\r
         list_add_tail(&reg0->session_link, &session->waiting);\r
@@ -635,11 +621,17 @@ static void rga_try_set_reg(uint32_t num)
                                                               \r
                 /* All CMD finish int */\r
                 rga_write(0x1<<10, RGA_INT);\r
+\r
+                \r
+                #if RGA_TEST_TIME\r
+                rga_start = ktime_get();\r
+                #endif\r
                 \r
                 /* Start proc */\r
                 atomic_set(&reg->session->done, 0);\r
                 rga_write(0x1, RGA_CMD_CTRL);                \r
 \r
+\r
                 #if RGA_TEST\r
                 {\r
                     uint32_t i;\r
@@ -702,7 +694,7 @@ static int rga_blit_async(rga_session *session, struct rga_req *req)
                if(ret == -EINVAL) {\r
                 return -EINVAL;\r
                }\r
-\r
+           \r
             reg = rga_reg_init(session, req);\r
             if(reg == NULL) {\r
                 return -EFAULT;\r
@@ -745,6 +737,8 @@ static int rga_blit_sync(rga_session *session, struct rga_req *req)
     daw = req->dst.act_w;\r
     dah = req->dst.act_h;\r
 \r
+    printk("req->rotate_mode = %.8x, req->scale_mode = %.8x\n", req->rotate_mode, req->scale_mode);\r
+\r
     if((req->render_mode == bitblt_mode) && (((saw>>1) >= daw) || ((sah>>1) >= dah))) \r
     {\r
         /* generate 2 cmd for pre scale */\r
@@ -777,37 +771,35 @@ static int rga_blit_sync(rga_session *session, struct rga_req *req)
         {\r
                return -EFAULT;\r
        }\r
-\r
-        //printk("rga_reg_int start \n");        \r
+      \r
         reg = rga_reg_init(session, req);\r
         if(reg == NULL) \r
         {            \r
             return -EFAULT;\r
         }\r
-        //printk("rga_reg_int end \n");\r
         \r
         atomic_set(&reg->int_enable, 1);        \r
         rga_try_set_reg(1);\r
     }    \r
-\r
-    \r
-    \r
+            \r
     ret_timeout = wait_event_interruptible_timeout(session->wait, atomic_read(&session->done), RGA_TIMEOUT_DELAY);\r
     if (unlikely(ret_timeout< 0)) \r
     {\r
                pr_err("pid %d wait task ret %d\n", session->pid, ret_timeout);\r
        } \r
-    else if (0 == ret_timeout) \r
+    else if (0 == ret_timeout)\r
     {\r
                pr_err("pid %d wait %d task done timeout\n", session->pid, atomic_read(&session->task_running));\r
                ret = -ETIMEDOUT;\r
        }\r
 \r
-    \r
-\r
-    return ret;\r
-   \r
-       //printk("rga_blit_sync done******************\n");\r
+    #if RGA_TEST_TIME\r
+    rga_end = ktime_get();\r
+    rga_end = ktime_sub(rga_end, rga_start);\r
+    printk("one cmd end time %d\n", (int)ktime_to_us(rga_end));\r
+    #endif\r
+        \r
+    return ret;   \r
 }\r
 \r
 \r
@@ -817,9 +809,7 @@ static long rga_ioctl(struct file *file, uint32_t cmd, unsigned long arg)
        int ret = 0;\r
     rga_session *session = (rga_session *)file->private_data;\r
 \r
-    #if RGA_TEST_TIME\r
-    rga_start = ktime_get();\r
-    #endif\r
+    \r
 \r
        if (NULL == session) \r
     {\r
@@ -866,7 +856,6 @@ static long rga_ioctl(struct file *file, uint32_t cmd, unsigned long arg)
     if(req != NULL) {\r
         kfree(req);\r
     }    \r
-\r
     \r
        return ret;\r
 }\r
@@ -1293,6 +1282,14 @@ static int __init rga_init(void)
                        return ret;\r
        }\r
 \r
+    #if 0\r
+    {\r
+        uint32_t i;\r
+        for(i=0; i<10; i++)\r
+            rga_test_0();\r
+    }\r
+    #endif\r
+\r
     //rga_test_0();\r
     \r
        INFO("Module initialized.\n");  \r
@@ -1319,7 +1316,7 @@ static void __exit rga_exit(void)
 }\r
 \r
 \r
-#if 1\r
+#if 0\r
 extern struct fb_info * rk_get_fb(int fb_id);\r
 EXPORT_SYMBOL(rk_get_fb);\r
 \r
@@ -1327,6 +1324,7 @@ extern void rk_direct_fb_show(struct fb_info * fbi);
 EXPORT_SYMBOL(rk_direct_fb_show);\r
 \r
 extern uint32_t ABGR8888_320_240_swap0[240][320];\r
+//unsigned int src_buf[1280*800];\r
 unsigned int dst_buf[1280*800];\r
 \r
 void rga_test_0(void)\r
@@ -1371,14 +1369,16 @@ void rga_test_0(void)
     req.src.vir_w = 320;\r
     req.src.vir_h = 240;\r
     req.src.yrgb_addr = (uint32_t)src;\r
+    req.src.uv_addr = ((uint32_t)src + 1920*1080);\r
+    req.src.format = 0;\r
 \r
-    req.dst.act_w = 100;\r
-    req.dst.act_h = 80;\r
+    req.dst.act_w = 320;\r
+    req.dst.act_h = 240;\r
 \r
     req.dst.vir_w = 1280;\r
     req.dst.vir_h = 800;\r
-    req.dst.x_offset = 200;\r
-    req.dst.y_offset = 200;\r
+    req.dst.x_offset = 0;\r
+    req.dst.y_offset = 000;\r
     req.dst.yrgb_addr = (uint32_t)dst;\r
 \r
     req.clip.xmin = 0;\r
@@ -1386,10 +1386,15 @@ void rga_test_0(void)
     req.clip.ymin = 0;\r
     req.clip.ymax = 799;\r
         \r
-    req.render_mode = 0;\r
+    req.render_mode = color_fill_mode ;\r
+    req.color_fill_mode = 0;\r
+    req.fg_color = 0xa0a0a0a0;\r
+    \r
     req.rotate_mode = 1;\r
     req.scale_mode = 2;\r
 \r
+    req.alpha_rop_flag = 0;\r
+\r
     req.sina = 0;\r
     req.cosa = 0x10000;\r
 \r

diff --git a/drivers/video/rockchip/rga/rga_mmu_info.c b/drivers/video/rockchip/rga/rga_mmu_info.c
index 5f802d1bd10e0f5d973e55ea7d2d270abf32f566..7fcc95fa9c1d832185f8020b9d0ce21183c33663 100755 (executable)
--- a/drivers/video/rockchip/rga/rga_mmu_info.c
+++ b/drivers/video/rockchip/rga/rga_mmu_info.c
@@ -644,7 +644,7 @@ static int rga_mmu_info_color_palette_mode(struct rga_reg *reg, struct rga_req *
          * change the buf address in req struct\r
          * for the reason of lie to MMU \r
          */\r
-        req->mmu_info.base_addr = virt_to_phys(MMU_Base);    \r
+        req->mmu_info.base_addr = (virt_to_phys(MMU_Base)>>2);    \r
         req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);\r
         req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK)) | ((CMDMemSize + SrcMemSize) << PAGE_SHIFT);\r
 \r
@@ -750,7 +750,7 @@ static int rga_mmu_info_color_fill_mode(struct rga_reg *reg, struct rga_req *req
          * change the buf address in req struct \r
          */\r
          \r
-        req->mmu_info.base_addr = virt_to_phys(MMU_Base);    \r
+        req->mmu_info.base_addr = (virt_to_phys(MMU_Base)>>2);    \r
         req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK)) | ((CMDMemSize) << PAGE_SHIFT);\r
                \r
         /*record the malloc buf for the cmd end to release*/\r
@@ -848,7 +848,7 @@ static int rga_mmu_info_line_point_drawing_mode(struct rga_reg *reg, struct rga_
          * change the buf address in req struct\r
          * for the reason of lie to MMU \r
          */\r
-        req->mmu_info.base_addr = virt_to_phys(MMU_Base);    \r
+        req->mmu_info.base_addr = (virt_to_phys(MMU_Base) >> 2);    \r
         req->dst.yrgb_addr = (req->dst.yrgb_addr & (~PAGE_MASK)) | ((CMDMemSize) << PAGE_SHIFT);\r
        \r
         \r
@@ -979,7 +979,7 @@ static int rga_mmu_info_blur_sharp_filter_mode(struct rga_reg *reg, struct rga_r
          * change the buf address in req struct\r
          * for the reason of lie to MMU \r
          */\r
-        req->mmu_info.base_addr = virt_to_phys(MMU_Base);\r
+        req->mmu_info.base_addr = (virt_to_phys(MMU_Base) >> 2);\r
         \r
         req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);\r
         req->src.uv_addr = (req->src.uv_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);\r
@@ -1144,7 +1144,7 @@ static int rga_mmu_info_pre_scale_mode(struct rga_reg *reg, struct rga_req *req)
          * for the reason of lie to MMU \r
          */\r
         \r
-        req->mmu_info.base_addr = virt_to_phys(MMU_Base)>>2;\r
+        req->mmu_info.base_addr = (virt_to_phys(MMU_Base)>>2);\r
 \r
         req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);\r
         req->src.uv_addr = (req->src.uv_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);\r
@@ -1247,7 +1247,7 @@ static int rga_mmu_info_update_palette_table_mode(struct rga_reg *reg, struct rg
          * change the buf address in req struct\r
          * for the reason of lie to MMU \r
          */\r
-        req->mmu_info.base_addr = virt_to_phys(MMU_Base);\r
+        req->mmu_info.base_addr = (virt_to_phys(MMU_Base) >> 2);\r
         \r
         req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);    \r
         \r
@@ -1344,7 +1344,7 @@ static int rga_mmu_info_update_patten_buff_mode(struct rga_reg *reg, struct rga_
          * change the buf address in req struct\r
          * for the reason of lie to MMU \r
          */\r
-        req->mmu_info.base_addr = virt_to_phys(MMU_Base);\r
+        req->mmu_info.base_addr = (virt_to_phys(MMU_Base) >> 2);\r
         \r
         req->src.yrgb_addr = (req->src.yrgb_addr & (~PAGE_MASK)) | (CMDMemSize << PAGE_SHIFT);    \r
         \r

diff --git a/drivers/video/rockchip/rga/rga_reg_info.c b/drivers/video/rockchip/rga/rga_reg_info.c
index f7b19cde031898d9ad00c14de3c048c228ae214e..65595ee1e4e796149aec01364296a8d1f4662455 100755 (executable)
--- a/drivers/video/rockchip/rga/rga_reg_info.c
+++ b/drivers/video/rockchip/rga/rga_reg_info.c
@@ -1003,11 +1003,6 @@ RGA_set_bitblt_reg_info(u8 *base, const struct rga_req * msg, TILE_INFO *tile)
             xp = CLIP(xp, msg->src.x_offset, msg->src.x_offset + msg->src.act_w - 1);\r
             yp = CLIP(yp, msg->src.y_offset, msg->src.y_offset + msg->src.act_h - 1);\r
         }\r
-\r
-        printk("xoffset = %.8x\n", msg->src.x_offset);\r
-        printk("yoffset = %.8x\n", msg->src.y_offset);\r
-        printk("xp = %.8x\n", xp);\r
-        printk("yp = %.8x\n", yp);\r
         \r
         switch(msg->src.format)\r
         {        \r
@@ -1052,8 +1047,6 @@ RGA_set_bitblt_reg_info(u8 *base, const struct rga_req * msg, TILE_INFO *tile)
                 break;\r
         }\r
 \r
-        printk("y_addr is %.8x\n", y_addr);\r
-\r
         *bRGA_SRC_Y_MST = y_addr;\r
         *bRGA_SRC_CB_MST = u_addr;\r
         *bRGA_SRC_CR_MST = v_addr;\r