rk312x:clk:modify apll_clk 600M when init

diff --git a/arch/arm/boot/dts/rk312x.dtsi b/arch/arm/boot/dts/rk312x.dtsi
index cdff07885d4f6c1d0767636ac92a98cff7605594..3d8e113759c066fe9e122ebbd7a1838d8aacd160 100755 (executable)
--- a/arch/arm/boot/dts/rk312x.dtsi
+++ b/arch/arm/boot/dts/rk312x.dtsi
@@ -288,7 +288,7 @@
                        <&clk_tsp &clk_gpll_div2>, <&clk_nandc &clk_gpll_div2>,
                        <&clk_mac_pll &clk_cpll>;
                rockchip,clocks-init-rate =
-                       <&clk_core 816000000>, <&clk_gpll 594000000>,
+                       <&clk_core 600000000>, <&clk_gpll 594000000>,
                        <&clk_cpll 400000000>, <&aclk_cpu 300000000>,
                        <&hclk_cpu_pre 150000000>, <&pclk_cpu_pre 75000000>,
                        <&aclk_peri 300000000>, <&hclk_peri_pre 150000000>,