struct video_info *video_info = &dp->video_info;
switch (dp->plat_data->dev_type) {
- case RK3288_DP:
+ case ROCKCHIP_DP:
/*
- * Like Rk3288 DisplayPort TRM indicate that "Main link
+ * Like ROCKCHIP DisplayPort TRM indicate that "Main link
* containing 4 physical lanes of 2.7/1.62 Gbps/lane".
*/
video_info->max_link_rate = 0x0A;
reg = SEL_24M | TX_DVDD_BIT_1_0625V;
writel(reg, dp->reg_base + ANALOGIX_DP_ANALOG_CTL_2);
- if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP)) {
+ if (dp->plat_data && (dp->plat_data->dev_type == ROCKCHIP_DP)) {
writel(REF_CLK_24M, dp->reg_base + ANALOGIX_DP_PLL_REG_1);
writel(0x95, dp->reg_base + ANALOGIX_DP_PLL_REG_2);
writel(0x40, dp->reg_base + ANALOGIX_DP_PLL_REG_3);
u32 reg;
u32 phy_pd_addr = ANALOGIX_DP_PHY_PD;
- if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP))
+ if (dp->plat_data && (dp->plat_data->dev_type == ROCKCHIP_DP))
phy_pd_addr = ANALOGIX_DP_PD;
switch (block) {
analogix_dp_reset_aux(dp);
/* Disable AUX transaction H/W retry */
- if (dp->plat_data && (dp->plat_data->dev_type == RK3288_DP))
+ if (dp->plat_data && (dp->plat_data->dev_type == ROCKCHIP_DP))
reg = AUX_BIT_PERIOD_EXPECTED_DELAY(0) |
AUX_HW_RETRY_COUNT_SEL(3) |
AUX_HW_RETRY_INTERVAL_600_MICROSECONDS;
struct drm_display_info *di = &connector->display_info;
struct rockchip_dp_device *dp = to_dp(plat_data);
- if (dp->plat_data.dev_type == RK3288_DP) {
+ if (dp->plat_data.dev_type == ROCKCHIP_DP) {
if (di->color_formats & DRM_COLOR_FORMAT_YCRCB444 ||
di->color_formats & DRM_COLOR_FORMAT_YCRCB422) {
di->color_formats &= ~(DRM_COLOR_FORMAT_YCRCB422 |
dp->plat_data.encoder = &dp->encoder;
- dp->plat_data.dev_type = RK3288_DP;
+ dp->plat_data.dev_type = ROCKCHIP_DP;
dp->plat_data.power_on = rockchip_dp_poweron;
dp->plat_data.power_off = rockchip_dp_powerdown;
dp->plat_data.mode_valid = rockchip_dp_mode_valid;