ARM64: dts: rockchip: add usb otg node for rk3366

Change-Id: I1c641a9b622861142991b5a19b40b145c9fd903c
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3366-tb.dts b/arch/arm64/boot/dts/rockchip/rk3366-tb.dts
index c7e7475ab2fb614e29738575080942fb5515f6a2..4dbfc10ee413d8bf27dd7c55c81d4a7649b7bd6d 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3366-tb.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3366-tb.dts
@@ -214,6 +214,36 @@
                sdcard-supply = <&vccio_sd>;
                tphdsor-supply = <&vcc_io>;
        };
+
+       dwc_control_usb: dwc-control-usb {
+               compatible = "rockchip,rk3368-dwc-control-usb";
+               rockchip,grf = <&grf>;
+               grf-offset = <0x049c>; /* GRF_SOC_STATUS for USB2.0 OTG */
+               interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "otg_id", "otg_bvalid",
+                                 "otg_linestate", "host0_linestate";
+               clocks = <&cru SCLK_USBPHY480M>;
+               clock-names = "usbphy_480m";
+
+               usb_bc {
+                       compatible = "inno,phy";
+                       regbase = &dwc_control_usb;
+                       rk_usb,bvalid     = <0x49c 23 1>;
+                       rk_usb,iddig      = <0x49c 26 1>;
+                       rk_usb,vdmsrcen   = <0x718 12 1>;
+                       rk_usb,vdpsrcen   = <0x718 11 1>;
+                       rk_usb,rdmpden    = <0x718 10 1>;
+                       rk_usb,idpsrcen   = <0x718  9 1>;
+                       rk_usb,idmsinken  = <0x718  8 1>;
+                       rk_usb,idpsinken  = <0x718  7 1>;
+                       rk_usb,dpattach   = <0x498 31 1>;
+                       rk_usb,cpdet      = <0x498 30 1>;
+                       rk_usb,dcpattach  = <0x498 29 1>;
+               };
+       };
 };
 
 &emmc {
@@ -594,3 +624,23 @@
        rx_delay = <0x10>;
        status = "okay";
 };
+
+&dwc_control_usb {
+       host_drv_gpio = <&gpio0 16 GPIO_ACTIVE_LOW>; /* GPIO_C0 = 16 */
+       otg_drv_gpio = <&gpio0 10 GPIO_ACTIVE_LOW>; /* GPIO_B2 = 10 */
+
+       rockchip,remote_wakeup;
+       rockchip,usb_irq_wakeup;
+};
+
+&usb_otg {
+       clocks = <&cru SCLK_OTG_PHY0>, <&cru HCLK_OTG>;
+       clock-names = "sclk_otgphy0", "otg";
+       resets = <&cru SRST_USBOTG_AHB>,
+                <&cru SRST_USBOTG_PHY>,
+                <&cru SRST_USBOTG_CON>;
+       reset-names = "otg_ahb", "otg_phy", "otg_controller";
+       /* 0 - Normal, 1 - Force Host, 2 - Force Device */
+       rockchip,usb-mode = <0>;
+       status = "okay";
+};

diff --git a/arch/arm64/boot/dts/rockchip/rk3366.dtsi b/arch/arm64/boot/dts/rockchip/rk3366.dtsi
index 89cb905dc0dab89d448033d24d25b5fcf3e5a92a..ffd733bd4ece663d04f5911feec42316d9d976a0 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3366.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3366.dtsi
@@ -335,6 +335,21 @@
                status = "disabled";
        };
 
+       usb_otg: usb@ff4c0000 {
+               compatible = "rockchip,rk3368-usb", "rockchip,rk3066-usb",
+                            "snps,dwc2";
+               reg = <0x0 0xff4c0000 0x0 0x40000>;
+               interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru HCLK_OTG>;
+               clock-names = "otg";
+               dr_mode = "otg";
+               g-np-tx-fifo-size = <16>;
+               g-rx-fifo-size = <275>;
+               g-tx-fifo-size = <256 128 128 64 64 32>;
+               g-use-dma;
+               status = "disabled";
+       };
+
        i2c1: i2c@ff660000 {
                compatible = "rockchip,rk3368-i2c", "rockchip,rk3288-i2c";
                reg = <0x0 0xff660000 0x0 0x1000>;