LR is in GPR, not tGPR even in Thumb1 mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104518 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index 21042da1a9a98e22aee970cb845d2a7f4462636c..768ffb9b6da0a894bc03e988a140da6af48d2df1 100644 (file)
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -2158,10 +2158,7 @@ SDValue ARMTargetLowering::LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const{
   }
 
   // Return LR, which contains the return address. Mark it an implicit live-in.
-  ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
-  TargetRegisterClass *RC = AFI->isThumb1OnlyFunction()
-    ? ARM::tGPRRegisterClass : ARM::GPRRegisterClass;
-  unsigned Reg = MF.addLiveIn(ARM::LR, RC); 
+  unsigned Reg = MF.addLiveIn(ARM::LR, ARM::GPRRegisterClass); 
   return DAG.getCopyFromReg(DAG.getEntryNode(), dl, Reg, VT);
 }
 

diff --git a/test/CodeGen/ARM/arm-returnaddr.ll b/test/CodeGen/ARM/arm-returnaddr.ll
index 5bf476dbf86cd28911d945d71a8f290aacc0c3fb..2c8f2abb978601c91c70acdfc9470995e127ea89 100644 (file)
--- a/test/CodeGen/ARM/arm-returnaddr.ll
+++ b/test/CodeGen/ARM/arm-returnaddr.ll
@@ -1,5 +1,7 @@
 ; RUN: llc < %s -mtriple=arm-apple-darwin | FileCheck %s
+; RUN: llc < %s -mtriple=thumbv6-apple-darwin
 ; rdar://8015977
+; rdar://8020118
 
 define arm_apcscc i8* @rt0(i32 %x) nounwind readnone {
 entry: