UPSTREAM: arm64: dts: rockchip: Add main thermal info to rk3368.dtsi

This patch add the thermal needed info on RK3368.
Meanwhile, support the trips to throttle for thermal.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit f990238f859e95841ecd151da258ea999555f609)

Change-Id: I76ba5230b1a334562ce7607aa02fec445612070c

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index faa290203b2cbe19a15a9f5a31991f4cb48bd019..504d503a3ea929bf6ea5300e66f5b856811804e7 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -49,6 +49,7 @@
 #include <dt-bindings/display/mipi_dsi.h>
 #include <dt-bindings/power/rk3368-power.h>
 #include <dt-bindings/soc/rockchip,boot-mode.h>
+#include <dt-bindings/thermal/thermal.h>
 
 / {
        compatible = "rockchip,rk3368";
@@ -131,6 +132,8 @@
                        enable-method = "psci";
                        clocks = <&cru ARMCLKL>;
                        operating-points-v2 = <&cluster1_opp>;
+
+                       #cooling-cells = <2>; /* min followed by max */
                };
 
                cpu_l1: cpu@1 {
@@ -171,6 +174,8 @@
                        enable-method = "psci";
                        clocks = <&cru ARMCLKB>;
                        operating-points-v2 = <&cluster0_opp>;
+
+                       #cooling-cells = <2>; /* min followed by max */
                };
 
                cpu_b1: cpu@101 {
@@ -524,6 +529,27 @@
                status = "disabled";
        };
 
+       thermal-zones {
+               #include "rk3368-thermal.dtsi"
+       };
+
+       tsadc: tsadc@ff280000 {
+               compatible = "rockchip,rk3368-tsadc";
+               reg = <0x0 0xff280000 0x0 0x100>;
+               interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
+               clock-names = "tsadc", "apb_pclk";
+               resets = <&cru SRST_TSADC>;
+               reset-names = "tsadc-apb";
+               pinctrl-names = "init", "default", "sleep";
+               pinctrl-0 = <&otp_gpio>;
+               pinctrl-1 = <&otp_out>;
+               pinctrl-2 = <&otp_gpio>;
+               #thermal-sensor-cells = <1>;
+               rockchip,hw-tshut-temp = <95000>;
+               status = "disabled";
+       };
+
        gmac: ethernet@ff290000 {
                compatible = "rockchip,rk3368-gmac";
                reg = <0x0 0xff290000 0x0 0x10000>;
@@ -1235,6 +1261,16 @@
                        };
                };
 
+               tsadc {
+                       otp_gpio: otp-gpio {
+                               rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
+                       };
+
+                       otp_out: otp-out {
+                               rockchip,pins = <0 10 RK_FUNC_1 &pcfg_pull_none>;
+                       };
+               };
+
                uart0 {
                        uart0_xfer: uart0-xfer {
                                rockchip,pins = <2 24 RK_FUNC_1 &pcfg_pull_up>,