// pointer register.
bool PPCFrameInfo::hasFP(const MachineFunction &MF) const {
const MachineFrameInfo *MFI = MF.getFrameInfo();
+ // FIXME: This is pretty much broken by design: hasFP() might be called really
+ // early, before the stack layout was calculated and thus hasFP() might return
+ // true or false here depending on the time of call.
+ return (MFI->getStackSize()) && needsFP(MF);
+}
+
+// needsFP - Return true if the specified function should have a dedicated frame
+// pointer register. This is true if the function has variable sized allocas or
+// if frame pointer elimination is disabled.
+bool PPCFrameInfo::needsFP(const MachineFunction &MF) const {
+ const MachineFrameInfo *MFI = MF.getFrameInfo();
// Naked functions have no stack frame pushed, so we don't have a frame
// pointer.
MBBI = MBB.begin();
// Work out frame sizes.
+ // FIXME: determineFrameLayout() may change the frame size. This should be
+ // moved upper, to some hook.
determineFrameLayout(MF);
unsigned FrameSize = MFI->getStackSize();
PPCFunctionInfo *FI = MF.getInfo<PPCFunctionInfo>();
bool MustSaveLR = FI->mustSaveLR();
// Do we have a frame pointer for this function?
- bool HasFP = hasFP(MF) && FrameSize;
+ bool HasFP = hasFP(MF);
int LROffset = PPCFrameInfo::getReturnSaveOffset(isPPC64, isDarwinABI);
PPCFunctionInfo *FI = MF.getInfo<PPCFunctionInfo>();
bool MustSaveLR = FI->mustSaveLR();
// Do we have a frame pointer for this function?
- bool HasFP = hasFP(MF) && FrameSize;
+ bool HasFP = hasFP(MF);
int LROffset = PPCFrameInfo::getReturnSaveOffset(isPPC64, isDarwinABI);
MachineFrameInfo *MFI = MF.getFrameInfo();
// If the frame pointer save index hasn't been defined yet.
- if (!FPSI && hasFP(MF)) {
+ if (!FPSI && needsFP(MF)) {
// Find out what the fix offset of the frame pointer save area.
int FPOffset = getFramePointerSaveOffset(isPPC64, isDarwinABI);
// Allocate the frame index for frame pointer save area.
// r0 for now.
if (RegInfo->requiresRegisterScavenging(MF)) // FIXME (64-bit): Enable.
- if (hasFP(MF) || spillsCR(MF)) {
+ if (needsFP(MF) || spillsCR(MF)) {
const TargetRegisterClass *GPRC = &PPC::GPRCRegClass;
const TargetRegisterClass *G8RC = &PPC::G8RCRegClass;
const TargetRegisterClass *RC = isPPC64 ? G8RC : GPRC;
const std::vector<CalleeSavedInfo> &CSI = FFI->getCalleeSavedInfo();
// Early exit if no callee saved registers are modified!
- if (CSI.empty() && !hasFP(MF)) {
+ if (CSI.empty() && !needsFP(MF)) {
return;
}
// Check whether the frame pointer register is allocated. If so, make sure it
// is spilled to the correct offset.
- if (hasFP(MF)) {
+ if (needsFP(MF)) {
HasGPSaveArea = true;
int FI = PFI->getFramePointerSaveIndex();
// When using the 32-bit SVR4 ABI, r13 is reserved for the Small Data Area
// pointer.
const PPCSubtarget &Subtarget = MF.getTarget().getSubtarget<PPCSubtarget>();
- const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo();
+ const PPCFrameInfo *PPCFI =
+ static_cast<const PPCFrameInfo*>(MF.getTarget().getFrameInfo());
if (Subtarget.isPPC64() || Subtarget.isSVR4ABI())
return end()-5; // don't allocate R13, R31, R0, R1, LR
- if (TFI->hasFP(MF))
+ if (PPCFI->needsFP(MF))
return end()-4; // don't allocate R31, R0, R1, LR
else
return end()-3; // don't allocate R0, R1, LR
}
G8RCClass::iterator
G8RCClass::allocation_order_end(const MachineFunction &MF) const {
- const TargetFrameInfo *TFI = MF.getTarget().getFrameInfo();
- if (TFI->hasFP(MF))
+ const PPCFrameInfo *PPCFI =
+ static_cast<const PPCFrameInfo*>(MF.getTarget().getFrameInfo());
+ if (PPCFI->needsFP(MF))
return end()-5;
else
return end()-4;
--- /dev/null
+; RUN: llc -disable-fp-elim < %s | FileCheck %s
+; PR8749
+target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128-n32"
+target triple = "powerpc-apple-darwin9.8"
+
+define i32 @main() nounwind {
+entry:
+; Make sure we're generating references using the red zone
+; CHECK: main:
+; CHECK: stw r3, -12(r1)
+ %retval = alloca i32
+ %0 = alloca i32
+ %"alloca point" = bitcast i32 0 to i32
+ store i32 0, i32* %0, align 4
+ %1 = load i32* %0, align 4
+ store i32 %1, i32* %retval, align 4
+ br label %return
+
+return: ; preds = %entry
+ %retval1 = load i32* %retval
+ ret i32 %retval1
+}