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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159936 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 769e3aaed43f68742313d0cffb2b46c1c2ed79a5..b084265e5af3f3bd86626489d338c03da26d8a58 100644 (file)
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -7294,7 +7294,7 @@ processInstruction(MCInst &Inst,
   case ARM::t2RORrr:
   case ARM::t2BICrr:
   {
-    // Assemblers should use the narrow encodings of these instructions when permissable.
+    // Assemblers should use the narrow encodings of these instructions when permissible.
     if ((isARMLowRegister(Inst.getOperand(1).getReg()) &&
          isARMLowRegister(Inst.getOperand(2).getReg())) &&
         Inst.getOperand(0).getReg() == Inst.getOperand(1).getReg() &&
@@ -7330,7 +7330,7 @@ processInstruction(MCInst &Inst,
   case ARM::t2ADCrr:
   case ARM::t2ORRrr:
   {
-    // Assemblers should use the narrow encodings of these instructions when permissable.
+    // Assemblers should use the narrow encodings of these instructions when permissible.
     // These instructions are special in that they are commutable, so shorter encodings
     // are available more often.
     if ((isARMLowRegister(Inst.getOperand(1).getReg()) &&