ELF symbol table field st_other support,

excluding visibility bits.

Mips (Mips16) specific e_header setting.

EF_MIPS_ARCH_ASE_M16 needs to be set in the
ELF header flags for Mips16.

Contributer: Reed Kotler

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175566 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/Support/ELF.h b/include/llvm/Support/ELF.h
index 62f5f32899619af65f402013f469968f89924489..3945043bbefeafc63eed4694baaad0274993cea0 100644 (file)
--- a/include/llvm/Support/ELF.h
+++ b/include/llvm/Support/ELF.h
@@ -738,10 +738,12 @@ enum {
   EF_MIPS_NOREORDER = 0x00000001, // Don't reorder instructions
   EF_MIPS_PIC       = 0x00000002, // Position independent code
   EF_MIPS_CPIC      = 0x00000004, // Call object with Position independent code
+
   //ARCH_ASE
   EF_MIPS_MICROMIPS = 0x02000000, // microMIPS
+  EF_MIPS_ARCH_ASE_M16 =
+                      0x04000000, // Has Mips-16 ISA extensions
   //ARCH
-  EF_MIPS_ARCH      = 0xf0000000, // Mask for applying EF_MIPS_ARCH_ variant
   EF_MIPS_ARCH_1    = 0x00000000, // MIPS1 instruction set
   EF_MIPS_ARCH_2    = 0x10000000, // MIPS2 instruction set
   EF_MIPS_ARCH_3    = 0x20000000, // MIPS3 instruction set
@@ -750,7 +752,8 @@ enum {
   EF_MIPS_ARCH_32   = 0x50000000, // MIPS32 instruction set per linux not elf.h
   EF_MIPS_ARCH_64   = 0x60000000, // MIPS64 instruction set per linux not elf.h
   EF_MIPS_ARCH_32R2 = 0x70000000, // mips32r2
-  EF_MIPS_ARCH_64R2 = 0x80000000  // mips64r2
+  EF_MIPS_ARCH_64R2 = 0x80000000, // mips64r2
+  EF_MIPS_ARCH      = 0xf0000000  // Mask for applying EF_MIPS_ARCH_ variant
 };
 
 // ELF Relocation types for Mips

diff --git a/lib/Target/Mips/MCTargetDesc/MipsELFStreamer.cpp b/lib/Target/Mips/MCTargetDesc/MipsELFStreamer.cpp
index ebcbf9decb5e950f9a3d92f49fc0c846eb3e55f1..e12b176b04c167f9b0b0d8de5d24f7c27eb68c46 100644 (file)
--- a/lib/Target/Mips/MCTargetDesc/MipsELFStreamer.cpp
+++ b/lib/Target/Mips/MCTargetDesc/MipsELFStreamer.cpp
@@ -36,7 +36,10 @@ namespace llvm {
     MCAssembler& MCA = getAssembler();
     unsigned EFlags = MCA.getELFHeaderEFlags();
 
-    EFlags |= ELF::EF_MIPS_NOREORDER;
+    if (Subtarget.inMips16Mode())
+      EFlags |= ELF::EF_MIPS_ARCH_ASE_M16;
+    else
+      EFlags |= ELF::EF_MIPS_NOREORDER;
 
     // Architecture
     if (Subtarget.hasMips64r2())

diff --git a/test/MC/Mips/elf_eflags.ll b/test/MC/Mips/elf_eflags.ll
index bb7857dd0fa5a94294c9d2ba05b37717fabd9a19..380c2b12955617840b9cc9eb2331f6935fb30fe5 100644 (file)
--- a/test/MC/Mips/elf_eflags.ll
+++ b/test/MC/Mips/elf_eflags.ll
@@ -25,7 +25,8 @@
 ; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips64r2 -relocation-model=static %s -o - | elf-dump --dump-section-data  | FileCheck -check-prefix=CHECK-BE64R2 %s
 ; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips64r2 %s -o - | elf-dump --dump-section-data  | FileCheck -check-prefix=CHECK-BE64R2_PIC %s
 
-
+; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+mips16 -relocation-model=pic %s -o - | elf-dump --dump-section-data  | FileCheck -check-prefix=CHECK-LE32R2-MIPS16 %s
+ 
 ; 32(R1) bit with NO_REORDER and static
 ; CHECK-BE32: ('e_flags', 0x50000001)
 ;
@@ -56,7 +57,9 @@
 ; 64R2 bit with NO_REORDER and PIC
 ; CHECK-BE64R2_PIC: ('e_flags', 0x80000003)
 ;
-
+; 32R2 bit MIPS16 with PIC
+; CHECK-LE32R2-MIPS16: ('e_flags', 0x74000002)
+ 
 define i32 @main() nounwind {
 entry:
   ret i32 0

diff --git a/test/MC/Mips/elf_st_other.ll b/test/MC/Mips/elf_st_other.ll
new file mode 100644 (file)
index 0000000..f188ce7
--- /dev/null
+++ b/test/MC/Mips/elf_st_other.ll
@@ -0,0 +1,13 @@
+; This tests value of ELF st_other field for function symbol table entries.
+; For microMIPS value should be equal to STO_MIPS_MICROMIPS.
+
+; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+micromips %s -o - | elf-dump --dump-section-data  | FileCheck %s
+
+define i32 @main() nounwind {
+entry:
+  ret i32 0
+}
+
+; CHECK:  'main'
+; CHECK:  ('st_other', 0x80)
+