unsigned errors;
+ int i2s_fifo_atn_level;
+
ktime_t last_dma_ts;
struct tegra_dma_channel *dma_chan;
struct completion stop_completion;
return 0;
}
+#if 0
+ i2s_fifo_clear(ads->i2s_base, I2S_FIFO_TX);
+#endif
+ i2s_fifo_set_attention_level(ads->i2s_base,
+ I2S_FIFO_TX, aos->i2s_fifo_atn_level);
+
req->source_addr = aos->buf_phys + out;
if (out < in)
req->size = in - out;
pr_debug("%s resume playback (%d in fifo, writing %d, in %d out %d)\n",
__func__, kfifo_len(&aos->fifo), req->size, in, out);
- i2s_fifo_set_attention_level(ads->i2s_base,
- I2S_FIFO_TX, I2S_FIFO_ATN_LVL_FOUR_SLOTS);
i2s_fifo_enable(ads->i2s_base, I2S_FIFO_TX, 1);
aos->last_dma_ts = ktime_get_real();
return -EINVAL;
}
+#if 0
i2s_fifo_clear(ads->i2s_base, I2S_FIFO_RX);
+#endif
i2s_fifo_set_attention_level(ads->i2s_base,
- I2S_FIFO_RX, I2S_FIFO_ATN_LVL_TWELVE_SLOTS);
+ I2S_FIFO_RX, ais->i2s_fifo_atn_level);
i2s_fifo_enable(ads->i2s_base, I2S_FIFO_RX, 1);
return 0;
}
pr_debug("%s\n", __func__);
i2s_fifo_set_attention_level(ads->i2s_base,
- I2S_FIFO_TX, I2S_FIFO_ATN_LVL_ONE_SLOT);
+ I2S_FIFO_TX, aos->i2s_fifo_atn_level);
+#if 0
i2s_fifo_clear(ads->i2s_base, I2S_FIFO_TX);
+#endif
i2s_set_fifo_irq_on_err(ads->i2s_base, I2S_FIFO_TX, 1);
i2s_set_fifo_irq_on_qe(ads->i2s_base, I2S_FIFO_TX, 1);
pr_debug("%s: start\n", __func__);
i2s_fifo_set_attention_level(ads->i2s_base,
- I2S_FIFO_RX, I2S_FIFO_ATN_LVL_TWELVE_SLOTS);
+ I2S_FIFO_RX, ais->i2s_fifo_atn_level);
+#if 0
i2s_fifo_clear(ads->i2s_base, I2S_FIFO_RX);
+#endif
i2s_set_fifo_irq_on_err(ads->i2s_base, I2S_FIFO_RX, 1);
i2s_set_fifo_irq_on_qe(ads->i2s_base, I2S_FIFO_RX, 1);
return -EIO;
}
+ state->out.i2s_fifo_atn_level = I2S_FIFO_ATN_LVL_FOUR_SLOTS;
+ state->in.i2s_fifo_atn_level = I2S_FIFO_ATN_LVL_FOUR_SLOTS;
+
res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
if (!res) {
dev_err(&pdev->dev, "no dma resource!\n");
clk_enable(audio_sync_clk);
/* disable interrupts from I2S */
+ i2s_fifo_clear(state->i2s_base, I2S_FIFO_TX);
+ i2s_fifo_clear(state->i2s_base, I2S_FIFO_RX);
i2s_enable_fifos(state->i2s_base, 0);
i2s_set_left_right_control_polarity(state->i2s_base, 0); /* default */