void MipsAsmPrinter::EmitStartOfAsmFile(Module &M) {
bool IsABICalls = Subtarget->isABICalls();
+ const MipsABIInfo &ABI = static_cast<const MipsTargetMachine &>(TM).getABI();
if (IsABICalls) {
getTargetStreamer().emitDirectiveAbiCalls();
Reloc::Model RM = TM.getRelocationModel();
// Ideally it should test for properties of the ABI and not the ABI
// itself.
// For the moment, I'm only correcting enough to make MIPS-IV work.
- if (RM == Reloc::Static && !Subtarget->isABI_N64())
+ if (RM == Reloc::Static && !ABI.IsN64())
getTargetStreamer().emitDirectiveOptionPic0();
}
// TODO: handle O64 ABI
- if (Subtarget->isABI_EABI()) {
+ if (ABI.IsEABI()) {
if (Subtarget->isGP32bit())
OutStreamer.SwitchSection(OutContext.getELFSection(".gcc_compiled_long32",
ELF::SHT_PROGBITS, 0));
// We should always emit a '.module fp=...' but binutils 2.24 does not accept
// it. We therefore emit it when it contradicts the ABI defaults (-mfpxx or
// -mfp64) and omit it otherwise.
- if (Subtarget->isABI_O32() && (Subtarget->isABI_FPXX() ||
- Subtarget->isFP64bit()))
+ if (ABI.IsO32() && (Subtarget->isABI_FPXX() || Subtarget->isFP64bit()))
getTargetStreamer().emitDirectiveModuleFP();
// We should always emit a '.module [no]oddspreg' but binutils 2.24 does not
// accept it. We therefore emit it when it contradicts the default or an
// option has changed the default (i.e. FPXX) and omit it otherwise.
- if (Subtarget->isABI_O32() && (!Subtarget->useOddSPReg() ||
- Subtarget->isABI_FPXX()))
+ if (ABI.IsO32() && (!Subtarget->useOddSPReg() || Subtarget->isABI_FPXX()))
getTargetStreamer().emitDirectiveModuleOddSPReg(Subtarget->useOddSPReg(),
- Subtarget->isABI_O32());
+ ABI.IsO32());
}
void MipsAsmPrinter::emitInlineAsmStart(
TII(*Subtarget->getInstrInfo()), TLI(*Subtarget->getTargetLowering()) {
MFI = funcInfo.MF->getInfo<MipsFunctionInfo>();
Context = &funcInfo.Fn->getContext();
- TargetSupported = ((TM.getRelocationModel() == Reloc::PIC_) &&
- ((Subtarget->hasMips32r2() || Subtarget->hasMips32()) &&
- (Subtarget->isABI_O32())));
+ TargetSupported =
+ ((TM.getRelocationModel() == Reloc::PIC_) &&
+ ((Subtarget->hasMips32r2() || Subtarget->hasMips32()) &&
+ (static_cast<const MipsTargetMachine &>(TM).getABI().IsO32())));
UnsupportedFPMode = Subtarget->isFP64bit();
}
DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc();
unsigned V0, V1, GlobalBaseReg = MipsFI->getGlobalBaseReg();
const TargetRegisterClass *RC;
-
- RC = (Subtarget->isABI_N64()) ? &Mips::GPR64RegClass : &Mips::GPR32RegClass;
+ const MipsABIInfo &ABI = static_cast<const MipsTargetMachine &>(TM).getABI();
+ RC = (ABI.IsN64()) ? &Mips::GPR64RegClass : &Mips::GPR32RegClass;
V0 = RegInfo.createVirtualRegister(RC);
V1 = RegInfo.createVirtualRegister(RC);
- if (Subtarget->isABI_N64()) {
+ if (ABI.IsN64()) {
MF.getRegInfo().addLiveIn(Mips::T9_64);
MBB.addLiveIn(Mips::T9_64);
MF.getRegInfo().addLiveIn(Mips::T9);
MBB.addLiveIn(Mips::T9);
- if (Subtarget->isABI_N32()) {
+ if (ABI.IsN32()) {
// lui $v0, %hi(%neg(%gp_rel(fname)))
// addu $v1, $v0, $t9
// addiu $globalbasereg, $v1, %lo(%neg(%gp_rel(fname)))
return;
}
- assert(Subtarget->isABI_O32());
+ assert(ABI.IsO32());
// For O32 ABI, the following instruction sequence is emitted to initialize
// the global base register: