rk: add common efuse support

diff --git a/arch/arm/mach-rk3188/clock_data.c b/arch/arm/mach-rk3188/clock_data.c
index ce4b507da79403251837890cb032d7be69ecbc75..eaddf609636424b1edb7cd35f4ca6d0152afd5ea 100755 (executable)
--- a/arch/arm/mach-rk3188/clock_data.c
+++ b/arch/arm/mach-rk3188/clock_data.c
@@ -21,6 +21,7 @@
 #include <linux/io.h>
 #include <linux/delay.h>
 #include <linux/hardirq.h>
+#include <plat/efuse.h>
 #include <mach/cru.h>
 #include <mach/iomux.h>
 #include <mach/clock.h>
@@ -3411,43 +3412,6 @@ static void div_clk_for_pll_init(void)
 }
 
 /************************************for cpll runing checking****************************************/
-/* eFuse controller register */
-#define EFUSE_A_SHIFT          (6)
-#define EFUSE_A_MASK           (0xFF)
-//#define EFUSE_PD             (1 << 5)
-//#define EFUSE_PS             (1 << 4)
-#define EFUSE_PGENB            (1 << 3)//active low
-#define EFUSE_LOAD             (1 << 2)
-#define EFUSE_STROBE           (1 << 1)  
-#define EFUSE_CSB              (1 << 0)  //active low
-
-#define REG_EFUSE_CTRL         (0x0000)
-#define REG_EFUSE_DOUT         (0x0004)
-
-#define efuse_readl(offset)            readl_relaxed(RK30_EFUSE_BASE + offset)
-#define efuse_writel(val, offset)      writel_relaxed(val, RK30_EFUSE_BASE + offset)
-int efuse_readregs(u32 addr, u32 length, u8 *pData)
-{
-       efuse_writel(EFUSE_CSB, REG_EFUSE_CTRL);
-       efuse_writel(EFUSE_LOAD | EFUSE_PGENB, REG_EFUSE_CTRL);
-       udelay(2);
-       do {
-               efuse_writel(efuse_readl(REG_EFUSE_CTRL) & (~(EFUSE_A_MASK << EFUSE_A_SHIFT)), REG_EFUSE_CTRL);
-               efuse_writel(efuse_readl(REG_EFUSE_CTRL) | ((addr & EFUSE_A_MASK) << EFUSE_A_SHIFT), REG_EFUSE_CTRL);
-               udelay(2);
-               efuse_writel(efuse_readl(REG_EFUSE_CTRL) | EFUSE_STROBE, REG_EFUSE_CTRL);
-               udelay(2);
-               *pData = efuse_readl(REG_EFUSE_DOUT);
-               efuse_writel(efuse_readl(REG_EFUSE_CTRL) & (~EFUSE_STROBE), REG_EFUSE_CTRL);
-               udelay(2);
-               pData++;
-               addr++;
-       } while(--length);
-       udelay(2);
-       efuse_writel(efuse_readl(REG_EFUSE_CTRL) | EFUSE_CSB, REG_EFUSE_CTRL);
-       udelay(1);
-       return 0;
-}
 static u8 pll_flag = 0;
 static int pll_get_flag(void)
 {

diff --git a/arch/arm/plat-rk/Makefile b/arch/arm/plat-rk/Makefile
index c80ef0514c94260357802be121b68fdf02099c9e..73c2524089b3dda78fc7b285c4b342b8747d2bbb 100755 (executable)
--- a/arch/arm/plat-rk/Makefile
+++ b/arch/arm/plat-rk/Makefile
@@ -12,6 +12,7 @@ obj-y += config.o
 obj-y += cpu.o
 obj-y += sram.o
 obj-y += iomux.o
+obj-y += efuse.o
 obj-$(CONFIG_DDR_TEST) += memtester.o ddr_test.o
 obj-$(CONFIG_DDR_FREQ) += ddr_freq.o
 obj-$(CONFIG_DVFS) += dvfs.o

diff --git a/arch/arm/plat-rk/efuse.c b/arch/arm/plat-rk/efuse.c
new file mode 100644 (file)
index 0000000..a5ce5db
--- /dev/null
+++ b/arch/arm/plat-rk/efuse.c
@@ -0,0 +1,66 @@
+/*
+ * Copyright (C) 2013 ROCKCHIP, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/delay.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <linux/spinlock.h>
+#include <plat/efuse.h>
+
+/* eFuse controller register */
+#define EFUSE_A_SHIFT          (6)
+#define EFUSE_A_MASK           (0xFF)
+//#define EFUSE_PD             (1 << 5)
+//#define EFUSE_PS             (1 << 4)
+#define EFUSE_PGENB            (1 << 3) //active low
+#define EFUSE_LOAD             (1 << 2)
+#define EFUSE_STROBE           (1 << 1)
+#define EFUSE_CSB              (1 << 0) //active low
+
+#define REG_EFUSE_CTRL         (0x0000)
+#define REG_EFUSE_DOUT         (0x0004)
+
+#if defined(CONFIG_ARCH_RK3188)
+#define efuse_readl(offset)            readl_relaxed(RK30_EFUSE_BASE + offset)
+#define efuse_writel(val, offset)      writel_relaxed(val, RK30_EFUSE_BASE + offset)
+#endif
+
+int efuse_readregs(u32 addr, u32 length, u8 *pData)
+{
+#ifdef efuse_readl
+       unsigned long flags;
+       static DEFINE_SPINLOCK(efuse_lock);
+
+       if (!length)
+               return 0;
+
+       spin_lock_irqsave(&efuse_lock, flags);
+
+       efuse_writel(EFUSE_CSB, REG_EFUSE_CTRL);
+       efuse_writel(EFUSE_LOAD | EFUSE_PGENB, REG_EFUSE_CTRL);
+       udelay(2);
+       do {
+               efuse_writel(efuse_readl(REG_EFUSE_CTRL) & (~(EFUSE_A_MASK << EFUSE_A_SHIFT)), REG_EFUSE_CTRL);
+               efuse_writel(efuse_readl(REG_EFUSE_CTRL) | ((addr & EFUSE_A_MASK) << EFUSE_A_SHIFT), REG_EFUSE_CTRL);
+               udelay(2);
+               efuse_writel(efuse_readl(REG_EFUSE_CTRL) | EFUSE_STROBE, REG_EFUSE_CTRL);
+               udelay(2);
+               *pData = efuse_readl(REG_EFUSE_DOUT);
+               efuse_writel(efuse_readl(REG_EFUSE_CTRL) & (~EFUSE_STROBE), REG_EFUSE_CTRL);
+               udelay(2);
+               pData++;
+               addr++;
+       } while(--length);
+       udelay(2);
+       efuse_writel(efuse_readl(REG_EFUSE_CTRL) | EFUSE_CSB, REG_EFUSE_CTRL);
+       udelay(1);
+
+       spin_unlock_irqrestore(&efuse_lock, flags);
+#endif
+       return 0;
+}

diff --git a/arch/arm/plat-rk/include/plat/efuse.h b/arch/arm/plat-rk/include/plat/efuse.h
new file mode 100644 (file)
index 0000000..68f409b
--- /dev/null
+++ b/arch/arm/plat-rk/include/plat/efuse.h
@@ -0,0 +1,8 @@
+#ifndef __PLAT_EFUSE_H
+#define __PLAT_EFUSE_H
+
+#include <asm/types.h>
+
+int efuse_readregs(u32 addr, u32 length, u8 *pData);
+
+#endif