This works now

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24150 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/IA64/IA64InstrInfo.td b/lib/Target/IA64/IA64InstrInfo.td
index 97764219545ac1e6ebc9fa9d92a1367b5d1e4b37..9bd8678478b5c1ea8d63010de369e8f896744bfc 100644 (file)
--- a/lib/Target/IA64/IA64InstrInfo.td
+++ b/lib/Target/IA64/IA64InstrInfo.td
@@ -360,8 +360,7 @@ def SELECTINT : Pat<(select PR:$which, GR:$src1, GR:$src2),
 // load constants of various sizes // FIXME: prettyprint -ve constants
 def : Pat<(i64 immSExt14:$imm), (ADDS r0, immSExt14:$imm)>;
 def : Pat<(i64 imm64:$imm), (MOVL imm64:$imm)>;
-//FIXME: tablegen coughs on this next one:
-//def : Pat<(i1 1), (CMPEQ r0, r0)>; // TODO: this should just be a ref to p0
+def : Pat<(i1 1), (CMPEQ r0, r0)>; // TODO: this should just be a ref to p0
 
 // TODO: support postincrement (reg, imm9) loads+stores - this needs more
 // tablegen support