efuse: add rk312x_efuse_readregs()

Signed-off-by: cl <cl@rock-chips.com>

diff --git a/arch/arm/mach-rockchip/efuse.c b/arch/arm/mach-rockchip/efuse.c
index ac8509022fe59b1b861bc0f06ced4e6b6a456e1f..4a0da82cd76cfde54fb77eb1026be8b929891331 100644 (file)
--- a/arch/arm/mach-rockchip/efuse.c
+++ b/arch/arm/mach-rockchip/efuse.c
@@ -97,6 +97,42 @@ static void __init rk3288_set_system_serial(void)
        system_serial_high = crc32(system_serial_low, buf + 8, 8);
 }
 
+int rk312x_efuse_readregs(u32 addr, u32 length, u8 *buf)
+{
+       unsigned long flags;
+       int ret = length;
+
+       if (!length)
+               return 0;
+
+       efuse_writel(EFUSE_LOAD, REG_EFUSE_CTRL);
+       udelay(2);
+       do {
+               efuse_writel(efuse_readl(REG_EFUSE_CTRL) &
+                               (~(EFUSE_A_MASK << RK312X_EFUSE_A_SHIFT)),
+                               REG_EFUSE_CTRL);
+               efuse_writel(efuse_readl(REG_EFUSE_CTRL) |
+                               ((addr & EFUSE_A_MASK) << RK312X_EFUSE_A_SHIFT),
+                               REG_EFUSE_CTRL);
+               udelay(2);
+               efuse_writel(efuse_readl(REG_EFUSE_CTRL) |
+                               EFUSE_STROBE, REG_EFUSE_CTRL);
+               udelay(2);
+               *buf = efuse_readl(REG_EFUSE_DOUT);
+               efuse_writel(efuse_readl(REG_EFUSE_CTRL) &
+                               (~EFUSE_STROBE), REG_EFUSE_CTRL);
+               udelay(2);
+               buf++;
+               addr++;
+       } while (--length);
+       udelay(2);
+       efuse_writel(efuse_readl(REG_EFUSE_CTRL) &
+                       (~EFUSE_LOAD) , REG_EFUSE_CTRL);
+       udelay(1);
+
+       return ret;
+}
+
 int rockchip_efuse_version(void)
 {
        return efuse.efuse_version;
@@ -129,5 +165,11 @@ void __init rockchip_efuse_init(void)
                } else {
                        pr_err("failed to read eFuse, return %d\n", ret);
                }
+       } else if (cpu_is_rk312x()) {
+               ret = rk312x_efuse_readregs(0, 32, efuse_buf);
+               if (ret == 32)
+                       efuse.get_leakage = rk3288_get_leakage;
+               else
+                       pr_err("failed to read eFuse, return %d\n", ret);
        }
 }

diff --git a/arch/arm/mach-rockchip/efuse.h b/arch/arm/mach-rockchip/efuse.h
index 4f2b16cf7e92c4792d97a293a1551d50401e75ca..0d04994b9b695c8905bbf989043bc50e73335a15 100644 (file)
--- a/arch/arm/mach-rockchip/efuse.h
+++ b/arch/arm/mach-rockchip/efuse.h
@@ -5,6 +5,7 @@
 
 /* eFuse controller register */
 #define EFUSE_A_SHIFT          (6)
+#define RK312X_EFUSE_A_SHIFT   (7)
 #define EFUSE_A_MASK           (0x3FF)
 //#define EFUSE_PD             (1 << 5)
 //#define EFUSE_PS             (1 << 4)

diff --git a/arch/arm/mach-rockchip/rk312x.c b/arch/arm/mach-rockchip/rk312x.c
index d9e08033a7b075e05a15e9bf8e41211daf133faa..7c8f69acbc65373a10cace12e00849591e9607e7 100755 (executable)
--- a/arch/arm/mach-rockchip/rk312x.c
+++ b/arch/arm/mach-rockchip/rk312x.c
@@ -144,6 +144,7 @@ static void __init rk312x_dt_map_io(void)
        dsb();
 
        rk312x_boot_mode_init();
+       rockchip_efuse_init();
 }
 
 static void __init rk3126_dt_map_io(void)