rk312x:clk:modify the vio clk dependencies
author张晴 <zhangqing@rock-chips.com>
Thu, 4 Sep 2014 07:34:29 +0000 (15:34 +0800)
committer张晴 <zhangqing@rock-chips.com>
Thu, 4 Sep 2014 07:34:29 +0000 (15:34 +0800)
arch/arm/boot/dts/rk312x-clocks.dtsi
arch/arm/boot/dts/rk312x.dtsi

index d895b135adda64e996ec6dee47d8602ff3ca3bc2..20ea35fc5f2a893c82069887cdf8cea02ce94d7a 100755 (executable)
                                #clock-cells = <0>;
                        };
 
+                       hclk_vio_niu: hclk_vio_niu {
+                               compatible = "rockchip,rk-fixed-factor-clock";
+                               clocks = <&hclk_vio_pre>;
+                               clock-output-names = "hclk_vio_niu";
+                               clock-div = <1>;
+                               clock-mult = <1>;
+                               #clock-cells = <0>;
+                       };
+
+                       aclk_vio0_niu: aclk_vio0_niu {
+                               compatible = "rockchip,rk-fixed-factor-clock";
+                               clocks = <&aclk_vio0_pre>;
+                               clock-output-names = "aclk_vio0_niu";
+                               clock-div = <1>;
+                               clock-mult = <1>;
+                               #clock-cells = <0>;
+                       };
+
+                       aclk_vio1_niu: aclk_vio1_niu {
+                               compatible = "rockchip,rk-fixed-factor-clock";
+                               clocks = <&aclk_vio1_pre>;
+                               clock-output-names = "aclk_vio1_niu";
+                               clock-div = <1>;
+                               clock-mult = <1>;
+                               #clock-cells = <0>;
+                       };
+
                };
 
                pd_cons {
                                        compatible = "rockchip,rk3188-gate-clk";
                                        reg = <0x00e8 0x4>;
                                        clocks =
-                                               <&aclk_vio0_pre>,               <&hclk_vio_pre>,
+                                               <&aclk_vio0_niu>,               <&hclk_vio_niu>,
                                                <&dummy>,               <&dummy>,
 
-                                               <&hclk_vio_pre>,                <&aclk_vio0_pre>,
+                                               <&hclk_vio_niu>,                <&aclk_vio0_niu>,
                                                <&dummy>,               <&dummy>,
 
                                                <&dummy>,               <&dummy>,
-                                               <&hclk_vio_pre>,                        <&aclk_vio0_pre>,
+                                               <&hclk_vio_niu>,                        <&aclk_vio0_niu>,
 
                                                <&hclk_vio_pre>,                <&aclk_vio0_pre>,
                                                <&dummy>,               <&dummy>;
                                                "reserved",             "reserved",
                                                "g_hclk_rga",           "g_aclk_rga",
 
-                                               "g_hclk_vio_bus",               "g_aclk_vio",
+                                               "hclk_vio_niu",         "aclk_vio0_niu",
                                                "reserved",             "reserved";
 
                                        rockchip,suspend-clkgating-setting = <0x0000 0x0000>;
                                                <&dummy>,               <&dummy>,
                                                <&pclk_pmu_pre>,                <&pclk_pmu_pre>,
 
-                                               <&dummy>,               <&hclk_vio_pre>,
-                                               <&hclk_vio_pre>,                <&hclk_vio_pre>,
+                                               <&dummy>,               <&hclk_vio_niu>,
+                                               <&hclk_vio_niu>,                <&hclk_vio_niu>,
 
-                                               <&aclk_vio1_pre>,               <&hclk_vio_pre>,
+                                               <&aclk_vio1_niu>,               <&hclk_vio_niu>,
                                                <&aclk_vio1_pre>,               <&dummy>,
 
                                                <&pclk_peri_pre>,               <&hclk_peri_pre>,
                                                "g_pclk_mipi",          "g_hclk_iep",
 
                                                "g_aclk_iep",           "g_hclk_ebc",
-                                               "g_aclk_vio1_niu",              "reserved",
+                                               "aclk_vio1_niu",                "reserved",
 
                                                "g_pclk_sim_card",              "g_hclk_usb_peri",
                                                "g_hclk_pe_arbi",               "g_aclk_peri_niu";
index abcf99ec2e4122f2bba72e2dc836d8a2d4be578b..3a6102bdac273b51994b06b79a4d40e23dcde8af 100755 (executable)
                                <&clk_gates4 1>,/*pclk_peri_axi_matrix*/
 
                                /*hclk_vio_pre*/
-                               <&clk_gates6 12>,/*hclk_vio_niu*/
+                               //<&clk_gates6 12>,/*hclk_vio_niu*/
                                //<&clk_gates6 1>,/*hclk_lcdc*/
 
                                /*aclk_vio0_pre*/
-                               <&clk_gates6 13>,/*aclk_vio*/
+                               //<&clk_gates6 13>,/*aclk_vio*/
                                //<&clk_gates6 0>,/*aclk_lcdc*/
 
                                /*aclk_vio1_pre*/
-                               <&clk_gates9 10>,/*aclk_vio1_niu*/
+                               //<&clk_gates9 10>,/*aclk_vio1_niu*/
 
                                /*UART*/
                                <&clk_gates1 12>,