#define RGA_POWER_OFF_DELAY 4*HZ /* 4s */\r
#define RGA_TIMEOUT_DELAY 2*HZ /* 2s */\r
\r
-#define RGA_MAJOR 232\r
+#define RGA_MAJOR 255\r
\r
#define RK30_RGA_PHYS 0x10114000\r
#define RK30_RGA_SIZE SZ_8K\r
ktime_t rga_start;\r
ktime_t rga_end;\r
\r
+dev_t rga_devi;\r
\r
struct rga_drvdata {\r
struct miscdevice miscdev;\r
static struct rga_drvdata *drvdata = NULL;\r
rga_service_info rga_service;\r
\r
-\r
-\r
static int rga_blit_async(rga_session *session, struct rga_req *req);\r
\r
\r
goto err_clock;\r
}\r
\r
- \r
+ #endif\r
\r
- data->aclk_rga = clk_get(NULL, "aclk_rga");\r
- \r
- if (IS_ERR(data->axi_clk))\r
+ data->aclk_rga = clk_get(NULL, "aclk_rga"); \r
+ if (IS_ERR(data->aclk_rga))\r
{\r
ERR("failed to find rga axi clock source\n");\r
ret = -ENOENT;\r
}\r
\r
data->hclk_rga = clk_get(NULL, "hclk_rga");\r
- if (IS_ERR(data->ahb_clk))\r
+ if (IS_ERR(data->hclk_rga))\r
{\r
ERR("failed to find rga ahb clock source\n");\r
ret = -ENOENT;\r
goto err_clock;\r
- }\r
- #endif\r
- \r
+ } \r
\r
/* map the memory */\r
if (!request_mem_region(RK30_RGA_PHYS, RK30_RGA_SIZE, "rga_io")) \r
\r
platform_set_drvdata(pdev, data);\r
drvdata = data;\r
-\r
+ \r
ret = misc_register(&rga_dev);\r
if(ret)\r
{\r
clk_put(data->hclk_disp_matrix);\r
}\r
\r
- if(data->aclk_ddr_lcdc) {\r
- clk_put(data->aclk_ddr_lcdc);\r
- }\r
\r
- if(data->hclk_lcdc) {\r
- clk_put(data->hclk_lcdc);\r
- }\r
\r
if(data->aclk_lcdc) {\r
clk_put(data->aclk_lcdc);\r
if(data->pd_display){\r
clk_put(data->pd_display);\r
}\r
- #endif \r
+ #endif\r
+\r
+ if(data->aclk_rga) {\r
+ clk_put(data->aclk_rga);\r
+ }\r
+ \r
+ if(data->hclk_rga) {\r
+ clk_put(data->hclk_rga);\r
+ }\r
\r
kfree(data);\r
return 0;\r