struct clk *cclk; /* core clock */
struct clk *iclk; /* interface clock */
int irq;
- u32 max_speed_hz;
spinlock_t lock;
int in_fifo_sz;
struct spi_qup *controller = spi_master_get_devdata(spi->master);
struct spi_qup_device *chip = spi_get_ctldata(spi);
- if (spi->chip_select >= spi->master->num_chipselect) {
- dev_err(controller->dev, "invalid chip_select %d\n",
- spi->chip_select);
- return -EINVAL;
- }
-
- if (spi->max_speed_hz > controller->max_speed_hz) {
- dev_err(controller->dev, "invalid max_speed_hz %d\n",
- spi->max_speed_hz);
- return -EINVAL;
- }
-
if (!chip) {
/* First setup */
chip = kzalloc(sizeof(*chip), GFP_KERNEL);
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LOOP;
master->num_chipselect = SPI_NUM_CHIPSELECTS;
master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);
+ master->max_speed_hz = max_freq;
master->setup = spi_qup_setup;
master->cleanup = spi_qup_cleanup;
master->set_cs = spi_qup_set_cs;
controller->iclk = iclk;
controller->cclk = cclk;
controller->irq = irq;
- controller->max_speed_hz = max_freq;
spin_lock_init(&controller->lock);
init_completion(&controller->done);