clocksource: sh_tmu: compute mult and shift before registration
authorAurelien Jarno <aurelien@aurel32.net>
Mon, 31 May 2010 21:45:48 +0000 (21:45 +0000)
committerGreg Kroah-Hartman <gregkh@suse.de>
Mon, 27 Sep 2010 00:21:37 +0000 (17:21 -0700)
commit 66f49121ffa41a19c59965b31b046d8368fec3c7 upstream.

Since commit 98962465ed9e6ea99c38e0af63fe1dcb5a79dc25 ("nohz: Prevent
clocksource wrapping during idle"), the CPU of an R2D board never goes
to idle. This commit assumes that mult and shift are assigned before
the clocksource is registered. As a consequence the safe maximum sleep
time is negative and the CPU never goes into idle.

This patch fixes the problem by moving mult and shift initialization
from sh_tmu_clocksource_enable() to sh_tmu_register_clocksource().

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
drivers/clocksource/sh_tmu.c

index 961f5b5ef6a3584c558c45dbe20a05074fe325b1..c0732466fb8749a5a5f81d67e3e5245b48eb3227 100644 (file)
@@ -199,16 +199,8 @@ static cycle_t sh_tmu_clocksource_read(struct clocksource *cs)
 static int sh_tmu_clocksource_enable(struct clocksource *cs)
 {
        struct sh_tmu_priv *p = cs_to_sh_tmu(cs);
-       int ret;
-
-       ret = sh_tmu_enable(p);
-       if (ret)
-               return ret;
 
-       /* TODO: calculate good shift from rate and counter bit width */
-       cs->shift = 10;
-       cs->mult = clocksource_hz2mult(p->rate, cs->shift);
-       return 0;
+       return sh_tmu_enable(p);
 }
 
 static void sh_tmu_clocksource_disable(struct clocksource *cs)
@@ -228,6 +220,16 @@ static int sh_tmu_register_clocksource(struct sh_tmu_priv *p,
        cs->disable = sh_tmu_clocksource_disable;
        cs->mask = CLOCKSOURCE_MASK(32);
        cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
+
+       /* clk_get_rate() needs an enabled clock */
+       clk_enable(p->clk);
+       /* channel will be configured at parent clock / 4 */
+       p->rate = clk_get_rate(p->clk) / 4;
+       clk_disable(p->clk);
+       /* TODO: calculate good shift from rate and counter bit width */
+       cs->shift = 10;
+       cs->mult = clocksource_hz2mult(p->rate, cs->shift);
+
        pr_info("sh_tmu: %s used as clock source\n", cs->name);
        clocksource_register(cs);
        return 0;