Revert r42653 and forward-port the code that lets INC64_32r be

converted to LEA64_32r in x86's convertToThreeAddress. This
replaces code like this:
   movl  %esi, %edi
   inc   %edi
with this:
   lea   1(%rsi), %edi
which appears to be beneficial.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61830 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index 9170c24ddbcaf6f2f8c31cc2bd30f334cb0dbaa2..c7ee6612fbeb5c01acf53b3a9c3e413f90f1a384 100644 (file)
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -1108,7 +1108,8 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
     switch (MIOpc) {
     default: return 0;
     case X86::INC64r:
-    case X86::INC32r: {
+    case X86::INC32r:
+    case X86::INC64_32r: {
       assert(MI->getNumOperands() >= 2 && "Unknown inc instruction!");
       unsigned Opc = MIOpc == X86::INC64r ? X86::LEA64r
         : (is64Bit ? X86::LEA64_32r : X86::LEA32r);
@@ -1126,7 +1127,8 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
                            Src, isKill, 1);
       break;
     case X86::DEC64r:
-    case X86::DEC32r: {
+    case X86::DEC32r:
+    case X86::DEC64_32r: {
       assert(MI->getNumOperands() >= 2 && "Unknown dec instruction!");
       unsigned Opc = MIOpc == X86::DEC64r ? X86::LEA64r
         : (is64Bit ? X86::LEA64_32r : X86::LEA32r);

diff --git a/test/CodeGen/X86/2to3-inc64.ll b/test/CodeGen/X86/2to3-inc64.ll
new file mode 100644 (file)
index 0000000..579e30c
--- /dev/null
+++ b/test/CodeGen/X86/2to3-inc64.ll
@@ -0,0 +1,21 @@
+; RUN: llvm-as < %s | llc -march=x86-64 -o %t -f -stats -info-output-file - | \
+; RUN:   grep {asm-printer} | grep {Number of machine instrs printed} | grep 5
+; RUN: grep {leal      1(\%rsi),} %t
+
+define fastcc zeroext i8 @fullGtU(i32 %i1, i32 %i2) nounwind {
+entry:
+  %0 = add i32 %i2, 1           ; <i32> [#uses=1]
+  %1 = sext i32 %0 to i64               ; <i64> [#uses=1]
+  %2 = getelementptr i8* null, i64 %1           ; <i8*> [#uses=1]
+  %3 = load i8* %2, align 1             ; <i8> [#uses=1]
+  %4 = icmp eq i8 0, %3         ; <i1> [#uses=1]
+  br i1 %4, label %bb3, label %bb34
+
+bb3:            ; preds = %entry
+  %5 = add i32 %i2, 4           ; <i32> [#uses=0]
+  ret i8 0
+
+bb34:           ; preds = %entry
+  ret i8 0
+}
+