ARM: shmobile: add R8A7778 basis support
authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Thu, 21 Mar 2013 10:01:36 +0000 (03:01 -0700)
committerSimon Horman <horms+renesas@verge.net.au>
Tue, 2 Apr 2013 01:58:23 +0000 (10:58 +0900)
Add initial support for the R8A7778 R-Car M1A SoC.
No static virtual mappings are used, all the components
make use of ioremap().
DT_MACHINE_START is still wrapped
in CONFIG_USE_OF to match other mach-shmobile code.

It is based on v1.0 datasheet

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm/boot/dts/r8a7778.dtsi [new file with mode: 0644]
arch/arm/mach-shmobile/Kconfig
arch/arm/mach-shmobile/Makefile
arch/arm/mach-shmobile/clock-r8a7778.c [new file with mode: 0644]
arch/arm/mach-shmobile/include/mach/r8a7778.h [new file with mode: 0644]
arch/arm/mach-shmobile/setup-r8a7778.c [new file with mode: 0644]

diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
new file mode 100644 (file)
index 0000000..4743735
--- /dev/null
@@ -0,0 +1,35 @@
+/*
+ * Device Tree Source for Renesas r8a7778
+ *
+ * Copyright (C) 2013  Renesas Solutions Corp.
+ * Copyright (C) 2013  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+ *
+ * based on r8a7779
+ *
+ * Copyright (C) 2013 Renesas Solutions Corp.
+ * Copyright (C) 2013 Simon Horman
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+       compatible = "renesas,r8a7778";
+
+       cpus {
+               cpu@0 {
+                       compatible = "arm,cortex-a9";
+               };
+       };
+
+       gic: interrupt-controller@fe438000 {
+               compatible = "arm,cortex-a9-gic";
+               #interrupt-cells = <3>;
+               interrupt-controller;
+               reg = <0xfe438000 0x1000>,
+                     <0xfe430000 0x100>;
+       };
+};
index 0e4a820bcbe8396d3d195787b5d5f66d6c7d7d58..49cba4a511df72199612454d7360cd5bedbe5453 100644 (file)
@@ -33,6 +33,12 @@ config ARCH_R8A7740
        select CPU_V7
        select SH_CLK_CPG
 
+config ARCH_R8A7778
+       bool "R-Car M1 (R8A77780)"
+       select CPU_V7
+       select SH_CLK_CPG
+       select ARM_GIC
+
 config ARCH_R8A7779
        bool "R-Car H1 (R8A77790)"
        select ARCH_WANT_OPTIONAL_GPIOLIB
index c5a43ef7cebf468873745ae750637605e0415eb1..2d42de46db8d876d3735227aa85914e0f720ac31 100644 (file)
@@ -10,6 +10,7 @@ obj-$(CONFIG_ARCH_SH7372)     += setup-sh7372.o clock-sh7372.o intc-sh7372.o
 obj-$(CONFIG_ARCH_SH73A0)      += setup-sh73a0.o clock-sh73a0.o intc-sh73a0.o
 obj-$(CONFIG_ARCH_R8A73A4)     += setup-r8a73a4.o clock-r8a73a4.o
 obj-$(CONFIG_ARCH_R8A7740)     += setup-r8a7740.o clock-r8a7740.o intc-r8a7740.o
+obj-$(CONFIG_ARCH_R8A7778)     += setup-r8a7778.o clock-r8a7778.o
 obj-$(CONFIG_ARCH_R8A7779)     += setup-r8a7779.o clock-r8a7779.o intc-r8a7779.o
 obj-$(CONFIG_ARCH_EMEV2)       += setup-emev2.o clock-emev2.o
 
diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
new file mode 100644 (file)
index 0000000..387e3b7
--- /dev/null
@@ -0,0 +1,91 @@
+/*
+ * r8a7778 clock framework support
+ *
+ * Copyright (C) 2013  Renesas Solutions Corp.
+ * Copyright (C) 2013  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+ *
+ * based on r8a7779
+ *
+ * Copyright (C) 2011  Renesas Solutions Corp.
+ * Copyright (C) 2011  Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <linux/io.h>
+#include <linux/sh_clk.h>
+#include <linux/clkdev.h>
+#include <mach/common.h>
+
+#define MSTPCR0                IOMEM(0xffc80030)
+#define MSTPCR1                IOMEM(0xffc80034)
+#define MSTPCR3                IOMEM(0xffc8003c)
+#define MSTPSR1                IOMEM(0xffc80044)
+#define MSTPSR4                IOMEM(0xffc80048)
+#define MSTPSR6                IOMEM(0xffc8004c)
+#define MSTPCR4                IOMEM(0xffc80050)
+#define MSTPCR5                IOMEM(0xffc80054)
+#define MSTPCR6                IOMEM(0xffc80058)
+
+/* ioremap() through clock mapping mandatory to avoid
+ * collision with ARM coherent DMA virtual memory range.
+ */
+
+static struct clk_mapping cpg_mapping = {
+       .phys   = 0xffc80000,
+       .len    = 0x80,
+};
+
+static struct clk clkp = {
+       .rate   = 62500000, /* FIXME: shortcut */
+       .flags  = CLK_ENABLE_ON_INIT,
+       .mapping = &cpg_mapping,
+};
+
+static struct clk *main_clks[] = {
+       &clkp,
+};
+
+enum {
+       MSTP016, MSTP015,
+       MSTP_NR };
+
+static struct clk mstp_clks[MSTP_NR] = {
+       [MSTP016] = SH_CLK_MSTP32(&clkp, MSTPCR0, 16, 0), /* TMU0 */
+       [MSTP015] = SH_CLK_MSTP32(&clkp, MSTPCR0, 15, 0), /* TMU1 */
+};
+
+static struct clk_lookup lookups[] = {
+       /* MSTP32 clocks */
+       CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */
+       CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP015]), /* TMU01 */
+};
+
+void __init r8a7778_clock_init(void)
+{
+       int k, ret = 0;
+
+       for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
+               ret = clk_register(main_clks[k]);
+
+       if (!ret)
+               ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
+
+       clkdev_add_table(lookups, ARRAY_SIZE(lookups));
+
+       if (!ret)
+               shmobile_clk_init();
+       else
+               panic("failed to setup r8a7778 clocks\n");
+}
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7778.h b/arch/arm/mach-shmobile/include/mach/r8a7778.h
new file mode 100644 (file)
index 0000000..a755dca
--- /dev/null
@@ -0,0 +1,28 @@
+/*
+ * Copyright (C) 2013  Renesas Solutions Corp.
+ * Copyright (C) 2013  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#ifndef __ASM_R8A7778_H__
+#define __ASM_R8A7778_H__
+
+extern void r8a7778_add_standard_devices(void);
+extern void r8a7778_add_standard_devices_dt(void);
+extern void r8a7778_init_delay(void);
+extern void r8a7778_init_irq(void);
+extern void r8a7778_init_irq_dt(void);
+extern void r8a7778_clock_init(void);
+
+#endif /* __ASM_R8A7778_H__ */
diff --git a/arch/arm/mach-shmobile/setup-r8a7778.c b/arch/arm/mach-shmobile/setup-r8a7778.c
new file mode 100644 (file)
index 0000000..811ccf3
--- /dev/null
@@ -0,0 +1,167 @@
+/*
+ * r8a7778 processor support
+ *
+ * Copyright (C) 2013  Renesas Solutions Corp.
+ * Copyright (C) 2013  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <linux/irqchip/arm-gic.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+#include <linux/irqchip.h>
+#include <linux/sh_timer.h>
+#include <mach/irqs.h>
+#include <mach/r8a7778.h>
+#include <mach/common.h>
+#include <asm/mach/arch.h>
+#include <asm/hardware/cache-l2x0.h>
+
+/* TMU */
+static struct resource sh_tmu0_resources[] = {
+       DEFINE_RES_MEM(0xffd80008, 12),
+       DEFINE_RES_IRQ(gic_iid(0x40)),
+};
+
+static struct sh_timer_config sh_tmu0_platform_data = {
+       .name                   = "TMU00",
+       .channel_offset         = 0x4,
+       .timer_bit              = 0,
+       .clockevent_rating      = 200,
+};
+
+static struct resource sh_tmu1_resources[] = {
+       DEFINE_RES_MEM(0xffd80014, 12),
+       DEFINE_RES_IRQ(gic_iid(0x41)),
+};
+
+static struct sh_timer_config sh_tmu1_platform_data = {
+       .name                   = "TMU01",
+       .channel_offset         = 0x10,
+       .timer_bit              = 1,
+       .clocksource_rating     = 200,
+};
+
+#define PLATFORM_INFO(n, i)                                    \
+{                                                              \
+       .parent         = &platform_bus,                        \
+       .name           = #n,                                   \
+       .id             = i,                                    \
+       .res            = n ## i ## _resources,                 \
+       .num_res        = ARRAY_SIZE(n ## i ##_resources),      \
+       .data           = &n ## i ##_platform_data,             \
+       .size_data      = sizeof(n ## i ## _platform_data),     \
+}
+
+struct platform_device_info platform_devinfo[] = {
+       PLATFORM_INFO(sh_tmu, 0),
+       PLATFORM_INFO(sh_tmu, 1),
+};
+
+void __init r8a7778_add_standard_devices(void)
+{
+       int i;
+
+#ifdef CONFIG_CACHE_L2X0
+       void __iomem *base = ioremap_nocache(0xf0100000, 0x1000);
+       if (base) {
+               /*
+                * Early BRESP enable, Shared attribute override enable, 64K*16way
+                * don't call iounmap(base)
+                */
+               l2x0_init(base, 0x40470000, 0x82000fff);
+       }
+#endif
+
+       for (i = 0; i < ARRAY_SIZE(platform_devinfo); i++)
+               platform_device_register_full(&platform_devinfo[i]);
+}
+
+#define INT2SMSKCR0    0x82288 /* 0xfe782288 */
+#define INT2SMSKCR1    0x8228c /* 0xfe78228c */
+
+#define INT2NTSR0      0x00018 /* 0xfe700018 */
+#define INT2NTSR1      0x0002c /* 0xfe70002c */
+static void __init r8a7778_init_irq_common(void)
+{
+       void __iomem *base = ioremap_nocache(0xfe700000, 0x00100000);
+
+       BUG_ON(!base);
+
+       /* route all interrupts to ARM */
+       __raw_writel(0x73ffffff, base + INT2NTSR0);
+       __raw_writel(0xffffffff, base + INT2NTSR1);
+
+       /* unmask all known interrupts in INTCS2 */
+       __raw_writel(0x08330773, base + INT2SMSKCR0);
+       __raw_writel(0x00311110, base + INT2SMSKCR1);
+
+       iounmap(base);
+}
+
+void __init r8a7778_init_irq(void)
+{
+       void __iomem *gic_dist_base;
+       void __iomem *gic_cpu_base;
+
+       gic_dist_base = ioremap_nocache(0xfe438000, PAGE_SIZE);
+       gic_cpu_base  = ioremap_nocache(0xfe430000, PAGE_SIZE);
+       BUG_ON(!gic_dist_base || !gic_cpu_base);
+
+       /* use GIC to handle interrupts */
+       gic_init(0, 29, gic_dist_base, gic_cpu_base);
+
+       r8a7778_init_irq_common();
+}
+
+void __init r8a7778_init_delay(void)
+{
+       shmobile_setup_delay(800, 1, 3); /* Cortex-A9 @ 800MHz */
+}
+
+#ifdef CONFIG_USE_OF
+void __init r8a7778_init_irq_dt(void)
+{
+       irqchip_init();
+       r8a7778_init_irq_common();
+}
+
+static const struct of_dev_auxdata r8a7778_auxdata_lookup[] __initconst = {
+       {},
+};
+
+void __init r8a7778_add_standard_devices_dt(void)
+{
+       of_platform_populate(NULL, of_default_bus_match_table,
+                            r8a7778_auxdata_lookup, NULL);
+}
+
+static const char *r8a7778_compat_dt[] __initdata = {
+       "renesas,r8a7778",
+       NULL,
+};
+
+DT_MACHINE_START(R8A7778_DT, "Generic R8A7778 (Flattened Device Tree)")
+       .init_early     = r8a7778_init_delay,
+       .init_irq       = r8a7778_init_irq_dt,
+       .init_machine   = r8a7778_add_standard_devices_dt,
+       .init_time      = shmobile_timer_init,
+       .dt_compat      = r8a7778_compat_dt,
+MACHINE_END
+
+#endif /* CONFIG_USE_OF */