make sure that BranchInst::getSuccessor() does not assert in cast<>
authorGabor Greif <ggreif@gmail.com>
Mon, 9 Feb 2009 15:45:06 +0000 (15:45 +0000)
committerGabor Greif <ggreif@gmail.com>
Mon, 9 Feb 2009 15:45:06 +0000 (15:45 +0000)
even if the underlying operand is NULL. This may happen in debugging context
within opt with partial loop unrolling (see test/Transforms/LoopUnroll/partial.ll).
After this fix I can resubmit the (backed out) r63459:
* lib/VMCore/AsmWriter.cpp: use precise accessors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64142 91177308-0d34-0410-b5e6-96231b3b80d8

include/llvm/Instructions.h
lib/VMCore/AsmWriter.cpp

index fbf376afd5d4db0b9207b9d992edc3650923c09d..d8ce835d79059dc9c40130e900848a3c6bc70f55 100644 (file)
@@ -2186,7 +2186,9 @@ public:
 
   BasicBlock *getSuccessor(unsigned i) const {
     assert(i < getNumSuccessors() && "Successor # out of range for Branch!");
-    return cast<BasicBlock>(getOperand(i));
+    if (Value *V = getOperand(i))
+      return cast<BasicBlock>(V);
+    return 0;
   }
 
   void setSuccessor(unsigned idx, BasicBlock *NewSucc) {
index 6a17516be26d71126d28a14ffae39ecd9a067dce..0322d669d325a07d56a16eb6d686ad799c801dc0 100644 (file)
@@ -1505,13 +1505,14 @@ void AssemblyWriter::printInstruction(const Instruction &I) {
   const Value *Operand = I.getNumOperands() ? I.getOperand(0) : 0;
 
   // Special case conditional branches to swizzle the condition out to the front
-  if (isa<BranchInst>(I) && I.getNumOperands() > 1) {
+  if (isa<BranchInst>(I) && cast<BranchInst>(I).isConditional()) {
+    BranchInst &BI(cast<BranchInst>(I));
     Out << ' ';
-    writeOperand(I.getOperand(2), true);
+    writeOperand(BI.getCondition(), true);
     Out << ", ";
-    writeOperand(Operand, true);
+    writeOperand(BI.getSuccessor(0), true);
     Out << ", ";
-    writeOperand(I.getOperand(1), true);
+    writeOperand(BI.getSuccessor(1), true);
 
   } else if (isa<SwitchInst>(I)) {
     // Special case switch statement to get formatting nice and correct...