case MVT::i32: Reg = X86::EAX; size = 4; break;
};
SDOperand cpIn = DAG.getCopyToReg(Op.getOperand(0), Reg,
- Op.getOperand(2), SDOperand());
+ Op.getOperand(3), SDOperand());
SDOperand Ops[] = { cpIn.getValue(0),
Op.getOperand(1),
- Op.getOperand(3),
+ Op.getOperand(2),
DAG.getTargetConstant(size, MVT::i8),
cpIn.getValue(1) };
SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag);
//FIXME: Please check the format Pseudo is certainly wrong, but the opcode and
// prefixes should be correct
+
let Defs = [EAX, EFLAGS], Uses = [EAX] in {
def CMPXCHG32 : I<0xB1, Pseudo, (outs), (ins i32mem:$ptr, GR32:$swap),
"cmpxchgl $swap,$ptr", []>, TB;