don't allow 'imm' or specific imms, like '1' on the LHS of a binop.

This shrinks X86GenDAGISel by ~330 lines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30574 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/utils/TableGen/DAGISelEmitter.cpp b/utils/TableGen/DAGISelEmitter.cpp
index d0137fca6f51e75ea5ff565c2f19df311ae9076d..28fdec5e88a7656d5564d5e53ae9cdf8eac56ca5 100644 (file)
--- a/utils/TableGen/DAGISelEmitter.cpp
+++ b/utils/TableGen/DAGISelEmitter.cpp
@@ -800,6 +800,17 @@ bool TreePatternNode::ApplyTypeConstraints(TreePattern &TP, bool NotRegisters) {
   }
 }
 
+/// OnlyOnRHSOfCommutative - Return true if this value is only allowed on the
+/// RHS of a commutative operation, not the on LHS.
+static bool OnlyOnRHSOfCommutative(TreePatternNode *N) {
+  if (!N->isLeaf() && N->getOperator()->getName() == "imm")
+    return true;
+  if (N->isLeaf() && dynamic_cast<IntInit*>(N->getLeafValue()))
+    return true;
+  return false;
+}
+
+
 /// canPatternMatch - If it is impossible for this pattern to match on this
 /// target, fill in Reason and return false.  Otherwise, return true.  This is
 /// used as a santity check for .td files (to prevent people from writing stuff
@@ -825,11 +836,9 @@ bool TreePatternNode::canPatternMatch(std::string &Reason, DAGISelEmitter &ISE){
   if (NodeInfo.hasProperty(SDNodeInfo::SDNPCommutative)) {
     // Scan all of the operands of the node and make sure that only the last one
     // is a constant node, unless the RHS also is.
-    if (getChild(getNumChildren()-1)->isLeaf() ||
-        getChild(getNumChildren()-1)->getOperator()->getName() != "imm") {
+    if (!OnlyOnRHSOfCommutative(getChild(getNumChildren()-1))) {
       for (unsigned i = 0, e = getNumChildren()-1; i != e; ++i)
-        if (!getChild(i)->isLeaf() && 
-            getChild(i)->getOperator()->getName() == "imm") {
+        if (OnlyOnRHSOfCommutative(getChild(i))) {
           Reason="Immediate value must be on the RHS of commutative operators!";
           return false;
         }