xs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58930
91177308-0d34-0410-b5e6-
96231b3b80d8
}
}
+#if 0
// If the LHS is '(and load, const)', the RHS is 0,
// the test is for equality or unsigned, and all 1 bits of the const are
// in the same partial word, see if we can shorten the load.
}
}
}
-
+#endif
+
// If the LHS is a ZERO_EXTEND, perform the comparison on the input.
if (N0.getOpcode() == ISD::ZERO_EXTEND) {
unsigned InSize = N0.getOperand(0).getValueType().getSizeInBits();