clk: rockchip: rk3288: fix i2s clk gate
authordkl <dkl@rock-chips.com>
Tue, 1 Apr 2014 08:05:27 +0000 (16:05 +0800)
committerdkl <dkl@rock-chips.com>
Tue, 1 Apr 2014 08:05:27 +0000 (16:05 +0800)
arch/arm/boot/dts/rk3288-clocks.dtsi
arch/arm/boot/dts/rk3288.dtsi

index 8f36c83f9e05b724205d86dbc8930e197ad35466..986db63a99d429049ab3da29868d62c618a63c47 100755 (executable)
 
                                        clock-output-names =
                                                "clk_i2s_out",          "clk_i2s_pll",
-                                               "i2s_frac",             "g_clk_i2s",
+                                               "i2s_frac",             "clk_i2s",
 
                                                "spdif_div",            "spdif_frac",
                                                "clk_spdif",            "spdif_8ch_div",
index 749b814e18f3f24dd2027cb788c8930f45afec0f..cb6cb17bbcfcb583767d89d96df19c3565a80ad5 100755 (executable)
                compatible = "rockchip-i2s";
                reg = <0xff890000 0x10000>;
                i2s-id = <0>;
-               clocks = <&clk_i2s>, <&clk_i2s_out>;
-               clock-names = "i2s_clk","i2s_mclk";
+               clocks = <&clk_i2s>, <&clk_i2s_out>, <&clk_gates10 8>;
+               clock-names = "i2s_clk","i2s_mclk", "i2s_hclk";
                interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
                dmas = <&pdma0 0>,
                        <&pdma0 1>;