Fix PR1499.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37472 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Transforms/Scalar/InstructionCombining.cpp b/lib/Transforms/Scalar/InstructionCombining.cpp
index 2a227423b60fff85819f92975ffa4710736f760d..01fcfabeba462f31a11d02929f24ac35c74a2136 100644 (file)
--- a/lib/Transforms/Scalar/InstructionCombining.cpp
+++ b/lib/Transforms/Scalar/InstructionCombining.cpp
@@ -1346,6 +1346,10 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask,
       
       // Signed shift right.
       APInt DemandedMaskIn(DemandedMask.shl(ShiftAmt));
+      // If any of the "high bits" are demanded, we should set the sign bit as
+      // demanded.
+      if (DemandedMask.countLeadingZeros() <= ShiftAmt)
+        DemandedMaskIn.set(BitWidth-1);
       if (SimplifyDemandedBits(I->getOperand(0),
                                DemandedMaskIn,
                                RHSKnownZero, RHSKnownOne, Depth+1))