Edit comment for accuracy

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@8562 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/RegAlloc/PhyRegAlloc.h b/lib/CodeGen/RegAlloc/PhyRegAlloc.h
index 195275fa6563a2a55bdade85de767c2d00410a81..7e86b1205d17f52202acb1df0e05bda91e310152 100644 (file)
--- a/lib/CodeGen/RegAlloc/PhyRegAlloc.h
+++ b/lib/CodeGen/RegAlloc/PhyRegAlloc.h
@@ -61,9 +61,9 @@ class PhyRegAlloc {
   const TargetRegInfo &MRI;             // Machine Register information
   const unsigned NumOfRegClasses;       // recorded here for efficiency
 
-  // Map to indicate whether operands of each MachineInstr have been updated
-  // according to their assigned colors.  This is primarily for debugging and
-  // could be removed in the long run.
+  // Map to indicate whether operands of each MachineInstr have been
+  // updated according to their assigned colors.  This is only used in
+  // assertion checking (debug builds).
   std::map<const MachineInstr *, bool> OperandsColoredMap;
   
   // AddedInstrMap - Used to store instrns added in this phase

diff --git a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.h b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.h
index 195275fa6563a2a55bdade85de767c2d00410a81..7e86b1205d17f52202acb1df0e05bda91e310152 100644 (file)
--- a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.h
+++ b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.h
@@ -61,9 +61,9 @@ class PhyRegAlloc {
   const TargetRegInfo &MRI;             // Machine Register information
   const unsigned NumOfRegClasses;       // recorded here for efficiency
 
-  // Map to indicate whether operands of each MachineInstr have been updated
-  // according to their assigned colors.  This is primarily for debugging and
-  // could be removed in the long run.
+  // Map to indicate whether operands of each MachineInstr have been
+  // updated according to their assigned colors.  This is only used in
+  // assertion checking (debug builds).
   std::map<const MachineInstr *, bool> OperandsColoredMap;
   
   // AddedInstrMap - Used to store instrns added in this phase