This adds necessary infrastructure to support the @h modifier.
Note that all required relocation types were already present
(and unused).
This patch provides support for using @h in the assembler;
it would also be possible to now use this feature in code
generated by the compiler, but this is not done yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184548
91177308-0d34-0410-b5e6-
96231b3b80d8
VK_ARM_PREL31,
VK_PPC_LO, // symbol@l
+ VK_PPC_HI, // symbol@h
VK_PPC_HA, // symbol@ha
VK_PPC_TOCBASE, // symbol@tocbase
VK_PPC_TOC, // symbol@toc
case VK_ARM_TARGET2: return "(target2)";
case VK_ARM_PREL31: return "(prel31)";
case VK_PPC_LO: return "l";
+ case VK_PPC_HI: return "h";
case VK_PPC_HA: return "ha";
case VK_PPC_TOCBASE: return "tocbase";
case VK_PPC_TOC: return "toc";
.Case("secrel32", VK_SECREL)
.Case("L", VK_PPC_LO)
.Case("l", VK_PPC_LO)
+ .Case("H", VK_PPC_HI)
+ .Case("h", VK_PPC_HI)
.Case("HA", VK_PPC_HA)
.Case("ha", VK_PPC_HA)
.Case("TOCBASE", VK_PPC_TOCBASE)
}
/// Extract @l/@ha modifier from expression. Recursively scan
-/// the expression and check for VK_PPC_LO / VK_PPC_HA
+/// the expression and check for VK_PPC_LO/HI/HA
/// symbol variants. If all symbols with modifier use the same
/// variant, return the corresponding PPCMCExpr::VariantKind,
/// and a modified expression using the default symbol variant.
case MCSymbolRefExpr::VK_PPC_LO:
Variant = PPCMCExpr::VK_PPC_LO;
break;
+ case MCSymbolRefExpr::VK_PPC_HI:
+ Variant = PPCMCExpr::VK_PPC_HI;
+ break;
case MCSymbolRefExpr::VK_PPC_HA:
Variant = PPCMCExpr::VK_PPC_HA;
break;
case MCSymbolRefExpr::VK_PPC_LO:
Type = ELF::R_PPC_ADDR16_LO;
break;
+ case MCSymbolRefExpr::VK_PPC_HI:
+ Type = ELF::R_PPC_ADDR16_HI;
+ break;
case MCSymbolRefExpr::VK_PPC_HA:
Type = ELF::R_PPC_ADDR16_HA;
break;
switch (Kind) {
default: llvm_unreachable("Invalid kind!");
case VK_PPC_LO: OS << "lo16"; break;
+ case VK_PPC_HI: OS << "hi16"; break;
case VK_PPC_HA: OS << "ha16"; break;
}
switch (Kind) {
default: llvm_unreachable("Invalid kind!");
case VK_PPC_LO: OS << "@l"; break;
+ case VK_PPC_HI: OS << "@h"; break;
case VK_PPC_HA: OS << "@ha"; break;
}
}
case VK_PPC_LO:
Result = Result & 0xffff;
break;
+ case VK_PPC_HI:
+ Result = (Result >> 16) & 0xffff;
+ break;
case VK_PPC_HA:
Result = ((Result >> 16) + ((Result & 0x8000) ? 1 : 0)) & 0xffff;
break;
case VK_PPC_LO:
Modifier = MCSymbolRefExpr::VK_PPC_LO;
break;
+ case VK_PPC_HI:
+ Modifier = MCSymbolRefExpr::VK_PPC_HI;
+ break;
case VK_PPC_HA:
Modifier = MCSymbolRefExpr::VK_PPC_HA;
break;
enum VariantKind {
VK_PPC_None,
VK_PPC_LO,
+ VK_PPC_HI,
VK_PPC_HA
};
return Create(VK_PPC_LO, Expr, Ctx);
}
+ static const PPCMCExpr *CreateHi(const MCExpr *Expr, MCContext &Ctx) {
+ return Create(VK_PPC_HI, Expr, Ctx);
+ }
+
static const PPCMCExpr *CreateHa(const MCExpr *Expr, MCContext &Ctx) {
return Create(VK_PPC_HA, Expr, Ctx);
}
addis 1, 1, 1b-2f@ha
2:
+addi 1, 1, target6@h
+addis 1, 1, target6@h
+
+.set target6, 0x4321fedc
+
.data
.quad v1
# CHECK-NEXT: ]
# CHECK-NEXT: Address: 0x0
# CHECK-NEXT: Offset:
-# CHECK-NEXT: Size: 40
+# CHECK-NEXT: Size: 48
# CHECK-NEXT: Link: 0
# CHECK-NEXT: Info: 0
# CHECK-NEXT: AddressAlignment: 4
# CHECK-NEXT: SectionData (
# CHECK-NEXT: 0000: 38211234 3C211234 38215678 3C211234
# CHECK-NEXT: 0010: 38214444 3C211111 38218001 3C211001
-# CHECK-NEXT: 0020: 38210008 3C210000
+# CHECK-NEXT: 0020: 38210008 3C210000 38214321 3C214321
# CHECK-NEXT: )
# CHECK-NEXT: }
# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16 target 0x0
lis 3, target
+# CHECK: li 3, target@h # encoding: [0x38,0x60,A,A]
+# CHECK-NEXT: # fixup A - offset: 2, value: target@h, kind: fixup_ppc_half16
+# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HI target 0x0
+ li 3, target@h
+
+# CHECK: lis 3, target@h # encoding: [0x3c,0x60,A,A]
+# CHECK-NEXT: # fixup A - offset: 2, value: target@h, kind: fixup_ppc_half16
+# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_HI target 0x0
+ lis 3, target@h
+
# CHECK: lwz 1, target@l(3) # encoding: [0x80,0x23,A,A]
# CHECK-NEXT: # fixup A - offset: 2, value: target@l, kind: fixup_ppc_half16
# CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_ADDR16_LO target 0x0