--- /dev/null
+/*
+ * RockChip. LCD_TD043MGEA1 FOR FPGA\r
+ *
+ */
+
+/ {
+ disp_power_ctr: power_ctr {
+ rockchip,debug = <0>;
+ /* lcd_en:lcd_en {\r
+ rockchip,power_type = <GPIO>;
+ gpios = <&gpio0 GPIO_B0 GPIO_ACTIVE_HIGH>;
+ rockchip,delay = <10>;
+ };*/\r
+
+ /* bl_en:bl_en {
+ rockchip,power_type = <GPIO>;
+ gpios = <&gpio0 GPIO_A2 GPIO_ACTIVE_HIGH>;
+ rockchip,delay = <10>;
+ };
+
+ bl_ctr:bl_ctr {
+ rockchip,power_type = <GPIO>;
+ gpios = <&gpio3 GPIO_D6 GPIO_ACTIVE_HIGH>;
+ rockchip,delay = <10>;
+ };
+
+ lcd_rst:lcd_rst {
+ rockchip,power_type = <REGULATOR>;
+ rockchip,delay = <5>;
+ };*/
+
+ };
+
+ disp_timings: display-timings {
+ native-mode = <&timing0>;
+ timing0: timing0 {
+ screen_type = <SCREEN_RGB>;\r
+ out_face = <OUT_P888>;\r
+ clock-frequency = <27000000>;\r
+ hactive = <800>;\r
+ vactive = <480>;\r
+ hback-porch = <206>;\r
+ hfront-porch = <40>;\r
+ vback-porch = <25>;\r
+ vfront-porch = <10>;\r
+ hsync-len = <10>;
+ vsync-len = <10>;\r
+ hsync-active = <0>;
+ vsync-active = <0>;
+ de-active = <0>;
+ pixelclk-active = <0>;
+ swap-rb = <0>;
+ swap-rg = <0>;
+ swap-gb = <0>;
+ };
+ };
+};
/dts-v1/;
#include "rk3288.dtsi"
+#include "lcd-td043mgeal.dtsi"
/ {
compatible = "rockchip,rk3288-fpga";
};
};
+
+&fb {
+ rockchip,disp-mode = <DUAL>;
+};
+
+&lcdc0 {
+ status = "okay";
+ power_ctr = <&disp_power_ctr>;
+ display-timings = <&disp_timings>;
+};
+
+&lcdc1 {
+ status = "okay";
+};
\ No newline at end of file